Fabrication of a-Si:H Tfts at 120°C on Flexible Polyimide Substrates

1999 ◽  
Vol 558 ◽  
Author(s):  
Andrei Sazonov ◽  
Arokia Nathan ◽  
R.V.R. Murthy ◽  
S.G. Chamberlain

ABSTRACTThe fabrication of large-area thin-film transistor (TFT) arrays on thin flexible plastic substrates requires deposition of thin film layers at relatively low temperatures since the upper working temperature of low-cost plastic films should not exceed ∼200°C. In this paper, we report a fabrication process of a-Si:H TFTs at 120°C on flexible polyimide substrates for large-area imaging applications.Kapton HN (DuPont) films 50 and 125 μm thick and 3 inches in diameter, were used as substrates. Both sides of the polyimide substrate were first covered with 0.5 μm thick a-SiNx. The TFT structure includes: 120 nm thick room-temperature sputtered Al gate, 250 nm thick PECVD deposited a-SiNx for the gate dielectric, 50 nm thick a-Si:H deposited by PECVD from silane-hydrogen gas mixture, 50 nm thick n+ a-Si:H source- and drain contacts, and roomtemperature sputtered Al top contact metallization. We used dry etching for all layers except for the gate and top metal, which were patterned using wet etchants. For purpose of TFT performance comparison, Coming 7059 glass substrates were used.The performance of the fabricated TFT and its improvement with use of optimized a-Si:H and a-SiNx quality will be presented along with a discussion of the intrinsic mechanical stress in the thin film layers will also be discussed.

2004 ◽  
Vol 808 ◽  
Author(s):  
I-Chun Cheng ◽  
Sigurd Wagner

ABSTRACTInverters made of monolithically integrated p- and n-channel thin film transistors of nanocrystalline silicon were demonstrated on both Corning 1737 glass and Kapton E polyimide substrates. The TFT's geometry is staggered top-gate, bottom-source/rain. A nc-Si:H seed layer promotes the structural evolution of the nc-Si:H channel. Electron field-effect mobilities of 15 - 30 cm2V−1s-1 and hole mobilities of 0.15 - 0.35 cm2V−1s−1 were obtained. Slightly lower carrier mobilities were observed in the TFTs made on polyimide than on glass substrates. High gate leakage currents and offsets between the supply HIGH voltages and the output voltages in the inverters indicate that the low-temperature gate dielectric needs improvement.


2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
Shizuyasu Ochiai ◽  
Kumar Palanisamy ◽  
Santhakumar Kannappan ◽  
Paik-Kyun Shin

Pentacene OFETs of bottom-gate/bottom-contact were fabricated with three types of pentacene organic semiconductors and cross linked Poly(4-vinylphenol) or polycarbonate as gate dielectric layer. Two different processes were used to prepare the pentacene active channel layers: (1) spin-coating on dielectric layer using two different soluble pentacene precursors of SAP and DMP; (2) vacuum evaporation on PC insulator. X-ray diffraction studies revealed coexistence of thin film and bulk phase of pentacene from SAP and thin film phase of pentacene from DMP precursors. The field effect mobility of 0.031 cm2/Vs and threshold voltage of −12.5 V was obtained from OFETs fabricated from SAP precursor, however, the pentacene OFETs from DMP under same preparation yielded high mobility of 0.09 cm2/Vs and threshold value decreased to −5 V. It reflects that the mixed phase films had carrier mobilities inferior to films consisting solely of single phase. For comparison, we have also fabricated pentacene OFETs by vacuum evaporation on polycarbonate as the gate dielectric and obtained charge carrier mobilities as large as 0.62 cm2/Vs and threshold voltage of −8.5 V. We demonstrated that the spin-coated pentacene using soluble pentacene precursors could be alternative process technology for low cost, large area and low temperature fabrication of OFETs.


2015 ◽  
Vol 804 ◽  
pp. 183-186
Author(s):  
Prapon Lertloypanyachai ◽  
Eakgapon Kaewnuam ◽  
Krittiya Sreebunpeng

Titanium dioxide (TiO2) is coated onto the materials (e.g.glass ceramic) to inhibit the bacteria growth. TiO2has become a popular photocatalyst for both air and water purification. It has also shown to be very active for bacterial destruction even under UV light. The photocatalytic of TiO2involves the light-induced catalysis of reducing and oxidizing reactions on the surface of materials. The spray pyrolysis technique for material synthesis in thin-film configuration is an interesting option due to the use of inexpensive precursor materials and low-cost equipment suitable for large-area coatings. In this research, TiO2thin films were deposited onto glass substrates using spray pyrolysis technique. Escherichia coli (E.coli) was used as testing bacteria. TiO2thin films showed some antibacterial effect in the halo test.


Author(s):  
Youssef Ahmed Mobarak ◽  
Moamen Atef

<span>The potential impact of high permittivity gate dielectrics on thin film transistors short channel and circuit performance has been studied using <a name="OLE_LINK110"></a><a name="OLE_LINK118"></a>highly accurate analytical models. In addition, the gate-to-channel capacitance and parasitic fringe capacitances have been extracted. The suggested model in this paper has been <a name="OLE_LINK37"></a><a name="OLE_LINK36"></a>increased the surface potential and decreased the <a name="OLE_LINK93"></a><a name="OLE_LINK92"></a>threshold voltage, whenever the conventional silicon dioxide gate dielectric<a name="OLE_LINK290"></a><a name="OLE_LINK280"></a> is replaced by high-K gate dielectric novel nanocomposite PVP/La<sub>2</sub>O<sub>3</sub>K<sub>ox</sub>=25. Also, it has been investigated that a decrease in parasitic outer fringe capacitance and gate-to-channel capacitance, whenever the conventional silicon nitride is replaced by low-K gate sidewall spacer dielectric novel nanocomposite PTFE/SiO<sub>2</sub>K<sub>sp</sub>=2.9. Finally, it has been demonstrated that using low-K gate sidewalls with high-K gate insulators can be decreased the gate fringing field and threshold voltage. In addition, fabrication of nanocomposites from polymers and nano-oxide particles found to have potential candidates for using it in a wide range of applications in low cost due to low process temperature of these nanocomposites materials.</span>


2004 ◽  
Vol 814 ◽  
Author(s):  
A. Nathan ◽  
D. Striakhilev ◽  
P. Servati ◽  
K. Sakariya ◽  
A. Sazonov ◽  
...  

AbstractIn view of its maturity and low-cost, the amorphous silicon (a-Si) technology is an attractive candidate for active matrix organic light emitting diode (AMOLED) display backplanes on flexible substrates. However, the a-Si material comes with significant intrinsic shortcomings related to speed (mobility) and stability of operation, requiring novel threshold-voltage-shift (ΔVT) compensated thin-film transistor (TFT) pixel circuits and architectures to enable stable OLED operation. But given the dramatic progress in efficiency of OLED materials over recent years, the drive current requirement has been significantly lowered, thus relaxing the constraints on a-Si TFTs. For compatibility to plastic substrates, the a-Si TFT process temperature must be reduced from the conventional 300°C to ∼150°C or below, which tends to compromise the integrity of thin- film materials and device performance. Hence, optimizing the TFT process for high device performance with limited thermal budget is a necessary step towards flexible AMOLEDs with a-Si backplanes. This paper reviews the design and process challenges, and specifically examines the performance of TFTs and ΔVT-compensated integrated pixel driver circuits on plastic substrates with respect to current driving ability and long term stability. More importantly, lifetime tests of circuit degradation behaviour over extended time periods demonstrate highly stable drive currents and its ability to meet commercial standards.


2005 ◽  
Vol 20 (4) ◽  
pp. 931-939 ◽  
Author(s):  
Seungmoon Pyo ◽  
Hyunsam Son ◽  
Mi Hye Yi

Low-temperature processable inherently photosensitive polyimide was prepared from a dianhydride, 3,3′,4,4′-benzophenone tetracarboxylic dianhydride, and aromatic diamines, 4,4′-diamino-3,3′dimethyl-diphenylmethane, through a polycondensation reaction, followed by a chemical imidization method. The photosensitive polyimide cured at 180 °C is used as a gate dielectric to fabricate flexible organic thin-film transistors with pentacene as an active semiconductor on polyethersulfone substrate. With the inherently photosensitive polyimide, the access to the gate electrode could be created easily without complicated and expensive lithographic techniques. A field effect carrier mobility of 0.007 cm2/V s was obtained for the pentacene organic thin-film transistors (OTFTs) with the photo-patterned polyimide as a gate dielectric. More detailed analysis for the pentacene OTFTs will be given with electrical properties of the thin polyimide film. Low-temperature processability and patternability of the polyimide give us more freedom to choose plastic substrates in OTFTs and facilitate the realization of low-cost organic electronics.


Author(s):  
Toan Thanh Dao

In this paper, a pentacene photo organic thin-film transistor (photoOTFT) was fabricated and characterized. The gate dielectric acted as a sensing layer thanks to it strongly absorbs UV light. Electrical behaviors of photoOTFT were measured under 365 nm UV illumination from the gate electrode side. The current in transistor channel was significantly enhanced by photoelectrons at interface of buffer/gate dielectric. Photosensitivity increased with the light intensity but decreased with the applied gate voltage. Meanwhile the photoresponsivity decreased with the light intensity and increased with the applied gate voltage. The transistor responses well with the pulse of light with many cycles of light-on and light-off were tested. The best photosensitivity, photoresponsivity, rising time and falling time parameters of the device were found to be about 104, 0.12 A/W, and 0.2 s, respectively. The obtained photoelectrical results suggest that the photoOTFT can be a good candidate for practical uses in low-cost UV optoelectronics.


2012 ◽  
Vol 2012 ◽  
pp. 1-8 ◽  
Author(s):  
Chao-Te Liu ◽  
Wen-Hsi Lee ◽  
Tsu-Lang Shih

We report a low-cost, mask-free, reduced material wastage, deposited technology using transparent, directly printable, air-stable semiconductor slurries and dielectric solutions. We have demonstrate an emerging process for fabricating printable transistors with ZnO nanoparticles as the active channel and poly(4-vinylphenol) (PVP) matrix as the gate dielectric, respectively, and the inkjet-printed ZnO TFTs have shown to exhibit the carrier mobility of 0.69 cm2/Vs and the threshold voltage of 25.5 V. We suggest that the printable materials and the printing technology enable the use of all-printed low-cost flexible displays and other transparent electronic applications.


Author(s):  
Eric N. Dattoli ◽  
Kevin Baler ◽  
Wei Lu

High-performance transparent and flexible thin film transistors (TFTs) were fabricated on glass and plastic substrates using alligned SnO2 nanowires as the channel material. High densities of crystalline SnO2 nanowires were dry-transferred directly onto the glass/plastic substrates, followed by low-temperature patterning of the source/drain and gate electrodes. Transparent TFTs fabricated on glass substrates show excellent electrical properties and optical transmittance. Excellent mechanical flexibility can be further obtained under cyclic tension experiments in devices fabricated on plastic substrates. The charge carrier mobility was estimated to be as high as 160 cm2/V·s — two orders of magnitude higher than that of conventional amorphous-silicon or organic TFTs. Cutoff frequency &gt; 70 MHz and on/off ratio &gt; 106 have also been demonstrated. The low-cost nanowire growth and dry-transfer processes make this approach a cost-effective means to fabricate transparent and/or flexible TFTs on non-conventional substrates.


1999 ◽  
Vol 558 ◽  
Author(s):  
B. Lee ◽  
L.J. Quinn ◽  
P.T. Baine ◽  
S.J.N. Mitchell ◽  
B.M. Armstrong ◽  
...  

ABSTRACTPolycrystalline silicon thin-film transistors (TFTs) have been fabricated on glass substrates using a low temperature top-gate self-aligned process. The interface between the polysilicon active layer and the silicon dioxide oxide gate dielectric is of vital importance in order to achieve good thin-film transistor electrical characteristics. Carrier transport takes place within 10nm of this interface, and any roughness in this region, corresponding to the initial surface roughness of the polysilicon layer, causes scattering of the carriers and a higher density of interface traps. Chemical-mechanical polishing has been used to reduce the initial surface roughness of the polysilicon. Electrical parameters of polished TFTs, such as mobility and threshold voltage, show a marked improvement compared to unpolished devices.


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