A 1.2V 12 Bits SAR ADC with a Two Stages Amplifier Full-scale Differential Dynamic Comparator

2018 ◽  
Author(s):  
Shouping Li ◽  
Yang Guo ◽  
Yao Liu ◽  
Jianjun Chen ◽  
Qing Xu ◽  
...  
Keyword(s):  
Full Scale ◽  
Sar Adc ◽  
Dynamic Comparator ◽  
Two Stages

scholarly journals Novel Treatment of Sugar Mill Wastewater in a Coupled System of Aged Refuse Filled Bioreactors (ARFB): Full-Scale

Processes ◽  
2021 ◽  
Vol 9 (3) ◽  
pp. 516
Author(s):  
Rubén Fernando Gutiérrez-Hernández ◽  
Hugo Alejandro Nájera-Aguilar ◽  
Juan Antonio Araiza-Aguilar ◽  
Rebeca Isabel Martínez-Salinas ◽  
Carlos Manuel García-Lara ◽  
...  
Keyword(s):  
Oxygen Demand ◽  
Coupled System ◽  
Food Supplement ◽  
Full Scale ◽  
Sugar Mill ◽  
Daily Diet ◽  
Aged Refuse ◽  
International Regulations ◽  
Sugar Mills ◽  
Two Stages

Sugar is the most important food supplement of our daily diet. During the production, sugar mills use a large volume of water and produce a significant amount of wastewater polluted with high organic compounds. Therefore, it is necessary to treat the wastewater before their disposal. For this reason, this article presents the results obtained from the monitoring of a coupled system of aged refuse filled bioreactors (ARFB) in full scale to treat wastewater from a sugar mill. The coupled system consists of two bioreactors (a primary one -ARFB1- and a rectification one -ARFB2-) arranged in a series with identical geometries. The ARFB1-ARFB2 system was evaluated in two stages. The first stage (maintenance period) for 28 weeks, and second stage (Zafra season) for 29 weeks. The system was fed with sugar mill wastewater (SMW) with a chemical oxygen demand (COD) of 2787 ± 1552 mg/L and 2601 ± 722 mg/L, respectively. As results, we observed a rapid stabilization of the system over 2 months. In addition, we found the ARFB1-ARFB2 system achieved an average COD removal of 94.9%, with a final effluent (E2) concentration below the maximum permissible limits of Mexican and international regulations for all analyzed parameters. Finally, the results of this study show that the ARFB1-ARFB2 full-scale novel technology is an efficient process for removal of the main contaminants that affect the wastewater from the sugar mills.

Design and Implementation of a 12-Bit 100MS/s ADC

2012 ◽  
Vol 229-231 ◽  
pp. 1507-1510
Author(s):  
Xiang Ning Fan ◽  
Hao Zheng ◽  
Yu Tao Sun ◽  
Xiang Yan
Keyword(s):  
Power Consumption ◽  
Power Supply ◽  
Stage Structure ◽  
Digital Calibration ◽  
Cmos Process ◽  
Pipelined Adc ◽  
Dynamic Comparator ◽  
Flash Adc ◽  
Design And Implementation ◽  
Two Stages

In this paper, a 12-bit 100MS/s pipelined ADC is designed. Capacitance flip-around structure is used in sample and hold circuit, and bootstrap structure is adopted in sampling switch which has high linearity. Progressively decreasing technology is used to reduce power consumption and circuit area, where 2.5bit/stage structure is used in the first two stages, 1.5bit/stage structure is used for 3rd to 8th stages, and at the end of the circuit is a 2bit-flash ADC. Digital calibration is designed to eliminate the offset of comparators. Switched-capacitor dynamic comparator structure is used to further reduce the power consumption. The ADC is implemented by using TSMC 0.18m CMOS process with die area be 1.23mm×2.3mm. SNDR and SFDR are 65dB and 71.3dB, when sampling at 100MHz sampling clock. The current of the circuit is 96mA under 1.8V power supply.

A Linearity Improved 10-bit 120-MS/s 1.5 mW SAR ADC with High-Speed and Low-Noise Dynamic Comparator Technique

2019 ◽  
Vol 29 (06) ◽  
pp. 2050084
Author(s):  
Daiguo Xu ◽  
Hequan Jiang ◽  
Dongbin Fu ◽  
Xiaoquan Yu ◽  
Shiliu Xu ◽  
...  
Keyword(s):  
High Speed ◽  
Cmos Technology ◽  
Low Noise ◽  
Sar Adc ◽  
Dynamic Comparator ◽  
Analog To Digital ◽  
Input Noise ◽  
Clock Feedthrough ◽  
Threshold Voltages ◽  
Coupled Technique

This paper presents a linearity improved 10-bit 120-MS/s successive approximation register (SAR) analog-to-digital converter (ADC) with high-speed and low-noise dynamic comparator. A gate cross-coupled technique is introduced in boost sampling switch, the clock feedthrough effect is compensated without extra auxiliary switch and the linearity of sampling switch is enhanced. Further, substrate voltage boost technique is proposed, the absolute values of threshold voltage and equivalent impedances of MOSFETs are both depressed. Consequently, the delay of comparator is also reduced. Moreover, the reduction of threshold voltages for input MOSFETs could bring higher transconductance and lower equivalent input noise. To demonstrate the proposed techniques, a design of SAR ADC is fabricated in 65-nm CMOS technology, consuming 1.5[Formula: see text]mW from 1[Formula: see text]V power supply with a SNDR [Formula: see text][Formula: see text]dB and SFDR [Formula: see text][Formula: see text]dB. The proposed ADC core occupies an active area of 0.021[Formula: see text]mm2, and the corresponding FoM is 24.4 fJ/conversion-step with Nyquist frequency.

A Noise Reduction 12-bit 125-MSPS SAR ADC with Modified Asynchronous Logic Regulation Technique

2020 ◽  
pp. 2150040
Author(s):  
Daiguo Xu ◽  
Han Yang ◽  
Xing Sheng ◽  
Ting Sun ◽  
Guangbing Chen ◽  
...  
Keyword(s):  
Noise Reduction ◽  
Feedback Loop ◽  
Cmos Technology ◽  
Sar Adc ◽  
Dynamic Comparator ◽  
Digital To Analog Converter ◽  
Analog To Digital ◽  
Asynchronous Logic ◽  
Analog Converter ◽  
Nyquist Rate

This paper presents noise reduction and modified asynchronous logic regulation techniques used in successive approximation register (SAR) analog-to-digital converter (ADC). With a transconductance enhanced structure, noise reduction is provided in the dynamic comparator. The input referred noise of the proposed comparator is about 165[Formula: see text][Formula: see text]V rms at 60∘C (typical corner). An enhanced-positive-feedback loop is introduced to reduce the regeneration delay of the comparator. In addition, a modified asynchronous logic regulation technique is exhibited, a clock with adaptable delay is driving the comparator in approximation phase. Consequently, the settling accuracy of DAC (Digital-to-Analog Converter) is enough and the conversion speed of SAR ADC is increased without any redundant cycles. To demonstrate the proposed techniques, a design of SAR ADC is fabricated in 65-nm CMOS technology, consuming 4[Formula: see text]mW from 1.2[Formula: see text]V power supply with a [Formula: see text][Formula: see text]dB and [Formula: see text][Formula: see text]dB. The proposed ADC core occupies an active area of 0.048[Formula: see text]mm2, and the corresponding FoM is 27.2[Formula: see text]fJ/conversion-step at Nyquist rate.

scholarly journals Assessing Pretreatment Effectiveness for Particulate, Organic and Biological Fouling in a Full-Scale SWRO Desalination Plant

Membranes ◽  
2021 ◽  
Vol 11 (3) ◽  
pp. 167
Author(s):  
Almotasembellah Abushaban ◽  
Sergio G. Salinas-Rodriguez ◽  
Delia Pastorelli ◽  
Jan C. Schippers ◽  
Subhanjan Mondal ◽  
...  
Keyword(s):  
Full Scale ◽  
Growth Potential ◽  
Feed Water ◽  
Biological Degradation ◽  
Two Stage ◽  
Particulate Fouling ◽  
Desalination Plant ◽  
Organic Fouling ◽  
Two Stages ◽  
Pretreatment Processes

In this study, the removal of particulate, organic and biological fouling potential was investigated in the two-stage dual media filtration (DMF) pretreatment of a full-scale seawater reverse osmosis (SWRO) desalination plant. Moreover, the removal of fouling potential in two-stage DMF (DMF pretreatment) was compared with the removal in two-stage DMF installed after dissolved air floatation (DAF) (DAF-DMF pretreatment). For this purpose, the silt density index (SDI), modified fouling index (MFI), bacterial growth potential (BGP), organic fractions and microbial adenosine triphosphate (ATP) were monitored in the pretreatment processes of two full-scale SWRO plants. Particulate fouling potential was well controlled through the two stages of DMF with significant removal of SDI15 (>80%), MFI0.45 (94%) and microbial ATP (>95%). However, lower removal of biological/organic fouling potential (24–41%) was observed due to frequent chlorination (weekly) of the pretreatment, resulting in low biological activity in the DMFs. Therefore, neutralizing chlorine before media filtration is advised, rather than after, as is the current practice in many full-scale SWRO plants. Comparing overall removal in the DAF-DMF pretreatment to that of the DMF pretreatment showed that DAF improved the removal of biological/organic fouling potential, in which the removal of BGP and biopolymers increased by 40% and 16%, respectively. Overall, monitoring ATP and BGP during the pretreatment processes, particularly in DMF, would be beneficial to enhance biological degradation and lower biofouling potential in SWRO feed water.

Sign in / Sign up

Export Citation Format

Share Document