Implementation of Quantum Gates based Logic Circuits using IBM Qiskit

Author(s):  
Enaul haq Shaik ◽  
Nakkeeran Rangaswamy
Keyword(s):  
2015 ◽  
Vol 24 (08) ◽  
pp. 1550121 ◽  
Author(s):  
Fuyou Fan ◽  
Guowu Yang ◽  
Gang Yang ◽  
William N. N. Hung

Because ternary computer has more superiority than other d-ary number systems, we focus on the investigation of ternary elementary quantum gates and the synthesis algorithm of ternary quantum logic circuits. Above all, Pauli operators and their matrices on qutrit are introduced. Then eight qutrit operators are selected as elementary operators and eight qutrit quantum logic gates are defined. Permutation groups are introduced to characterize the quantum gates and quantum logic circuits. Some important qutrit quantum logic gates are defined also, such as QNOT, QKCXi, EQKCXi, QSwap, QCNOT and EQCNOT. Based on these elementary gates, we prove two very important theorems: (1) all qutrit quantum reversible logic circuit can be generated by Xi gate and QKCXi gate; (2) all qutrit quantum reversible logic circuits can be generated by Xi gate and QCNOT gate. The two theorems indicate that any complicated qutrit quantum reversible circuit can be constructed by the simplest ternary quantum gate. This will greatly simplify the implementation difficulty of quantum circuit. Subsequently, we propose a synthesis algorithm for qutrit quantum reversible logic circuit, which is verified through simulation experiment by the computer program we have designed.


2014 ◽  
Vol 12 (05) ◽  
pp. 1450034 ◽  
Author(s):  
Zhiqiang Li ◽  
Xiaoyu Song ◽  
Marek Perkowski ◽  
Hanwu Chen ◽  
Xiaoxia Feng

Since non-permutative quantum gates have more complex rules than permutative quantum gates, it is very hard to synthesize quantum logic circuits using non-permutative quantum gates, such as controlled-square-root-of-NOT gates (CV∕CV+ gates). In the efficient synthesis algorithm, direct use of quantum non-permutative gates should be avoided. Rather, the key method is to use quantum gates to create new permutative quantum gates that then replace non-permutative quantum gates. This method assumes the library of quantum gate primitives are constructed so as to have the lowest possible quantum cost. In this paper, we first propose some new CV∕CV+-like gates, i.e. controlled-kth-root-of-NOT gates where k = 2,4,8,…, and give all corresponding matrixes. Further, we also present a novel generic method to quickly and directly construct this new optimal quantum logic gate library using CNOT and these non-permutative quantum gates. Our method introduces new means to find permutative quantum gates with lower quantum cost.


The theory of quantum computational networks is the quantum generalization of the theory of logic circuits used in classical computing machines. Quantum gates are the generalization of classical logic gates. A single type of gate, the universal quantum gate, together with quantum ‘unit wires’, is adequate for constructing networks with any possible quantum computational property.


1993 ◽  
Vol 140 (6) ◽  
pp. 327-332
Author(s):  
M.-D. Shieh ◽  
C.-L. Wey ◽  
P.D. Fisher

2020 ◽  
Vol 4 (3) ◽  
pp. 29-39
Author(s):  
Sulkhiya Gazieva ◽  

The future of labor market depends upon several factors, long-term innovation and the demographic developments. However, one of the main drivers of technological change in the future is digitalization and central to this development is the production and use of digital logic circuits and its derived technologies, including the computer,the smart phone and the Internet. Especially, smart automation will perhaps not cause e.g.regarding industries, occupations, skills, tasks and duties


Author(s):  
Randal Mulder ◽  
Sam Subramanian ◽  
Tony Chrastecky

Abstract The use of atomic force probe (AFP) analysis in the analysis of semiconductor devices is expanding from its initial purpose of solely characterizing CMOS transistors at the contact level with a parametric analyzer. Other uses found for the AFP include the full electrical characterization of failing SRAM bit cells, current contrast imaging of SOI transistors, measuring surface roughness, the probing of metallization layers to measure leakages, and use with other tools, such as light emission, to quickly localize and identify defects in logic circuits. This paper presents several case studies in regards to these activities and their results. These case studies demonstrate the versatility of the AFP. The needs and demands of the failure analysis environment have quickly expanded its use. These expanded capabilities make the AFP more valuable for the failure analysis community.


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