Study of interface traps for GaN-based MIS-HEMTs with high pressure oxidized aluminium as gate dielectric

Author(s):  
Bhuvnesh Kushwah ◽  
Srikanth Kanaga ◽  
Gourab Dutta ◽  
Nandita DasGupta ◽  
Amitava DasGupta
2019 ◽  
Vol 954 ◽  
pp. 133-138
Author(s):  
Ao Liu ◽  
Song Bai ◽  
Run Hua Huang ◽  
Tong Tong Yang ◽  
Hao Liu

The mechanism of threshold voltage shift was studied. It is believed that the instability in threshold voltage during gate bias stress is due to capture of electrons by the SiC/gate dielectric interface traps and the gate dielectric near interface traps. New experimental platform was designed and built successfully. When positive stress or negative stress is applied to the gate, the change of threshold voltage occur immediately. After stress removal, the recovery of the threshold voltage occur soon. The change and recovery of threshold voltage are very sensitive to time. In order to get accurate threshold voltage drift data after high-temperature gate bias experiment, test of threshold voltage must be carried out immediately after the experiment.


2019 ◽  
Vol 16 (10) ◽  
pp. 175-180 ◽  
Author(s):  
Ruilong Xie ◽  
Nan Wu ◽  
Chen Shen ◽  
Chunxiang Zhu

2006 ◽  
Vol 510-511 ◽  
pp. 190-193
Author(s):  
K.H. Baik ◽  
Seung Joon Ahn ◽  
Chul Geun Park ◽  
Seung Young Lee ◽  
Seung Joon Ahn

We investigated the characteristics of the HfO2 layer deposited by ALD method in MOSFET devices where the HfO2 film is incorporated as the gate dielectric layer. The HfO2 film was annealed with forming gas (FG) or high-pressure D2 gas to investigate the effect of annealing on the characteristics of the MOSFET device. It was found that the drain current and transconductance of the D2-annealed MOSFET device increased remarkably by ~10% compared with those of FG-annealed MOSFET device, which is a definite improvement that may contribute to reliable operation of the ultra high-density MOSFET devices.


Electronics ◽  
2018 ◽  
Vol 7 (12) ◽  
pp. 416 ◽  
Author(s):  
Kuiwei Geng ◽  
Ditao Chen ◽  
Quanbin Zhou ◽  
Hong Wang

Three different insulator layers SiNx, SiON, and SiO2 were used as a gate dielectric and passivation layer in AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMT). The SiNx, SiON, and SiO2 were deposited by a plasma-enhanced chemical vapor deposition (PECVD) system. Great differences in the gate leakage current, breakdown voltage, interface traps, and current collapse were observed. The SiON MIS-HEMT exhibited the highest breakdown voltage and Ion/Ioff ratio. The SiNx MIS-HEMT performed well in current collapse but exhibited the highest gate leakage current density. The SiO2 MIS-HEMT possessed the lowest gate leakage current density but suffered from the early breakdown of the metal–insulator–semiconductor (MIS) diode. As for interface traps, the SiNx MIS-HEMT has the largest shallow trap density and the lowest deep trap density. The SiO2 MIS-HEMT has the largest deep trap density. The factors causing current collapse were confirmed by Photoluminescence (PL) spectra. Based on the direct current (DC) characteristics, SiNx and SiON both have advantages and disadvantages.


2017 ◽  
Vol 75 ◽  
pp. 154-161 ◽  
Author(s):  
Slah Hlali ◽  
Neila Hizem ◽  
Liviu Militaru ◽  
Adel Kalboussi ◽  
Abdelkader Souifi

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