1.5-nm Node Surrounding Gate Transistor (SGT)-SRAM Cell with Staggered Pillar and Self-Aligned Process for Gate, Bottom Contact, and Pillar
2017 ◽
Vol 7
(4)
◽
pp. 16
Keyword(s):
2018 ◽
Vol 6
(4)
◽
pp. 332-340
2017 ◽
Vol MCSP2017
(01)
◽
pp. 7-10
◽
Keyword(s):