Results of a high density flip chip on flex reliability test program

A method for the construction of high density (2.4 mm−2) vertical leads through a pyrex substrate is presented. The pyrex substrate behaves as a TCE (Thermal Coefficient of Expansion) matched interposer that permits anodic bonding of silicon micromirrors on one side and flip-chip bumping of multiplexing electronic chips on its opposite side. Electrical leads consist of 250±25 μm-diameter holes formed by AJM machining and coated with evaporated Au yielding via resistances of 0.5–0.7 Ω. The via holes are sealed with a new spin-cast polyimide tenting process that enables the subsequent patterning of multiple levels of metal using conventional lithographic techniques.

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Combined Manufacture Methods for High Density LTCC Substrates: Thick Film Screen Printing, Ink Jet, Postfiring Thin Film Processes, and Laser-Drilled Fine Vias

Journal of Microelectronics and Electronic Packaging ◽

10.4071/1551-4897-6.1.6 ◽

2009 ◽

Vol 6 (1) ◽

pp. 6-12 ◽

Cited By ~ 3

Author(s):

Arne Albertsen ◽

Koji Koiwai ◽

Kyoji Kobayashi ◽

Tomonori Oguchi ◽

Katsumi Aruga

Keyword(s):

Thin Film ◽

Thick Film ◽

Screen Printing ◽

Flip Chip ◽

High Density ◽

Uv Laser ◽

Fine Pitch ◽

Ink Jet ◽

Printing Ink ◽

Base Substrate

This paper highlights the possible combination of technologies such as thick film screen printing, ink jet, and post-firing thin film processes in conjunction with laser-drilled fine vias to produce high-density, miniaturized LTCC substrates. To obtain the silver pattern on the inner layers, both conventional thick film printing and ink jet printing (using nano silver particle dispersed ink) were applied on the ceramic green sheets. The ink jet process made it possible to metallize fine lines with line/space = 30/30 μm. For interlayer connections, fine vias of 30 μm in diameter formed by UV laser were used. Then these sheets were stacked on top of each other and fired to obtain a base substrate. On this base substrate, fine copper patterns for flip chip mounting were formed by a thin film process. The surface finish consisted of a nickel passivation and a gold layer deposited by electroless plating. The combination of the three patterning processes for conducting traces and UV laser drilling of fine vias make it appear possible to realize fine pitch LTCC, for example, for flip chip device mounting.

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Die to Die and Die To Wafer Bonding Solution for High Density, Fine Pitch Micro-Bumped Die

Additional Conferences (Device Packaging HiTEC HiTEN & CICMT) ◽

10.4071/2012dpc-tha15 ◽

2012 ◽

Vol 2012 (DPC) ◽

pp. 002251-002284 ◽

Cited By ~ 1

Author(s):

Gilbert Lecarpentier ◽

Joeri De Vos

Keyword(s):

Wafer Bonding ◽

Flip Chip ◽

High Accuracy ◽

High Density ◽

Size Reduction ◽

Direct Impact ◽

3 Dimensional ◽

Fine Pitch ◽

Placement Accuracy ◽

Die Bonding

Higher density interconnection using 3-Dimensional technology implies a pitch reduction and the use of micro-bumps. The micro-bump size reduction has a direct impact on the placement accuracy needed on the die placement and flip chip bonding equipment. The paper presents a Die-to-Die and Die-to-Wafer, high accuracy, die bonding solution illustrated by the flip chip assembly of a large 2x2cm die consisting of 1 million 10 μm micro-bumps at 20 μm pitch

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Precise Chip Joint Method with Sub-micron Au Particle for High-density SiC Power Module Operating at High Temperature

Additional Conferences (Device Packaging HiTEC HiTEN & CICMT) ◽

10.4071/hiten-wa17 ◽

2013 ◽

Vol 2013 (HITEN) ◽

pp. 000254-000259 ◽

Cited By ~ 2

Author(s):

Fumiki Kato ◽

Fengqun Lang ◽

Simanjorang Rejeki ◽

Hiroshi Nakagawa ◽

Hiroshi Yamaguchi ◽

...

Keyword(s):

Shear Strength ◽

High Temperature ◽

Flip Chip ◽

Stress Test ◽

High Density ◽

Cathode Side ◽

Module Structure ◽

Power Devices ◽

Power Module ◽

Joint Method

In this work, a novel precise chip joint method using sub-micron Au particle for high-density silicon carbide (SiC) power module operating at high temperature is proposed. A module structure of SiC power devices are sandwiched between two silicon nitride-active metal brazed copper (SiN-AMC) circuit boards. To make a precise position and height control of the chip bonding, the top side (gate/source or anode pad side) of SiC power devices are flip-chip bonded to circuit electrodes using sub-micron Au particle with low temperature (250°C) and pressure-less sintering. The accuracy of the bonding position of chips was less than 10 μm and the accuracy of the height after bonding chips was less than 15 μm. Mechanical shear fatigue tests for flip-chip bonded SiC Schottky barrier diode (SBD) were carried out. As a result, initial shear strength of the joint was 36 MPa. The shear strength of 43 MPa is obtained after storage life test (500 hours at 250°C), and also 35 MPa is obtained even after thermal cycle stress test (1000 cycles between −40°C and 250°C). The flip-chip bonding of SiC-JFET is successfully realizedon the substrate without short or open failure electrically. Finally we joint the backside of the SiC-JFET (drain side) and the SiC-SBD (cathode side) to each circuit electrodes at once by means of reflow process with Au-12%Ge solder. The structured sandwich SiC power module was also successfully formed.

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Comparison of different flex materials in high density flip chip on flex applications

Microelectronics Reliability ◽

10.1016/s0026-2714(02)00273-1 ◽

2003 ◽

Vol 43 (3) ◽

pp. 445-451 ◽

Cited By ~ 15

Author(s):

Petteri Palm ◽

Jarmo Määttänen ◽

Yannick De Maquillé ◽

Alain Picault ◽

Jan Vanfleteren ◽

...

Keyword(s):

Flip Chip ◽

High Density

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Optimizing System-on-Film (SOF) Design Using Finite Element Analysis

ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 1 ◽

10.1115/ipack2011-52143 ◽

2011 ◽

Author(s):

Vikram Venkatadri ◽

Mark Downey ◽

Xiaojie Xue ◽

Dipak Sengupta ◽

Daryl Santos ◽

...

Keyword(s):

Finite Element Analysis ◽

Finite Element ◽

Flip Chip ◽

Flexible Substrate ◽

High Density ◽

Design Solution ◽

Design Parameters ◽

Optimized Design ◽

Element Analysis ◽

Bonding Parameters

System-On-Film (SOF) module is a complex integration of a fine pitch high density die and surface mounted discrete devices on a polyimide (PI) film laminate. The die is connected to the film using a thermo-compression flip-chip bonding (TCB) process which is capable of providing a very high density interconnect at less than 50um pitch. Several design and bonding parameters have to be controlled in order to achieve a reliable bond between the Au bumps on the die and the Sn plated Cu traces on the PI film. In the current work, the TCB process is studied using Finite Element Analysis (FEA) to optimize the design parameters and assure proper process margins. The resultant forces acting on the bump-to-trace interfaces are quantified across the different potential geometrical combinations. Baseline simulations showed higher stresses on specific bump locations and stress gradients acting on the bumps along the different sides of the die. These observations were correlated to both the failures and near failures on the actual test vehicles. Further simulations were then utilized to optimize and navigate design tradeoffs at both the die and flexible substrate design levels for a more robust design solution. Construction analysis performed on parts built using optimized design parameters showed significant improvements and correlated well with the simulation results.

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