Fixation Ratio of Error Location-Aware Strategy for Increased Reliable Retention Time of Flash Memory

2016 ◽  
Vol 24 (10) ◽  
pp. 3145-3155 ◽  
Author(s):  
Debao Wei ◽  
Liyan Qiao ◽  
Shiyuan Wang ◽  
Xiyuan Peng
Nanomaterials ◽  
2021 ◽  
Vol 11 (5) ◽  
pp. 1101
Author(s):  
Muhammad Naqi ◽  
Nayoung Kwon ◽  
Sung Hyeon Jung ◽  
Pavan Pujar ◽  
Hae Won Cho ◽  
...  

Non-volatile memory (NVM) devices based on three-terminal thin-film transistors (TFTs) have gained extensive interest in memory applications due to their high retained characteristics, good scalability, and high charge storage capacity. Herein, we report a low-temperature (<100 °C) processed top-gate TFT-type NVM device using indium gallium zinc oxide (IGZO) semiconductor with monolayer gold nanoparticles (AuNPs) as a floating gate layer to obtain reliable memory operations. The proposed NVM device exhibits a high memory window (ΔVth) of 13.7 V when it sweeps from −20 V to +20 V back and forth. Additionally, the material characteristics of the monolayer AuNPs (floating gate layer) and IGZO film (semiconductor layer) are confirmed using transmission electronic microscopy (TEM), atomic force microscopy (AFM), and x-ray photoelectron spectroscopy (XPS) techniques. The memory operations in terms of endurance and retention are obtained, revealing highly stable endurance properties of the device up to 100 P/E cycles by applying pulses (±20 V, duration of 100 ms) and reliable retention time up to 104 s. The proposed NVM device, owing to the properties of large memory window, stable endurance, and high retention time, enables an excellent approach in futuristic non-volatile memory technology.


2008 ◽  
Vol 52 (10) ◽  
pp. 1536-1541 ◽  
Author(s):  
Akeed A. Pavel ◽  
Mehjabeen A. Khan ◽  
Phumin Kirawanich ◽  
N.E. Islam

2004 ◽  
Vol 832 ◽  
Author(s):  
Dengtao Zhao ◽  
Yan Zhu ◽  
Ruigang Li ◽  
Jianlin Liu

ABSTRACTThe transient process of the programming and erasing is very important for a nanocrystal-floating-gate flash memory. In this work, a computer simulation was carried out to investigate the charging, retention and erasing processes of our proposed Ge/Si hetero-nanocrystal floating gate flash memory. The transient gate current, the transient drain current and the average charge in one dot were simulated respectively. Evident hysteresis features can be observed in the transient processes in a voltage-sweeping measurement mode. While measuring the transient process in a constant voltage mode, the time decay of transient current and charge are weakened if Ge is used on the Si dot, indicating a longer retention time for Ge/Si-floating-gate flash memory.


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