<title>High-Speed Electro-Optic Analog-To-Digital (A/D) Converter</title>

1993 ◽

Vol 51 ◽

pp. 768-769

Author(s):

M. T. Postek ◽

A. E. Vladar

Keyword(s):

Electron Microscopy ◽

Scanning Electron Microscopy ◽

Digital Imaging ◽

High Speed ◽

High Performance ◽

Mass Storage ◽

Analog To Digital ◽

Central Processing ◽

Digital Imaging Technology ◽

Scanning Electron

One of the major advancements applied to scanning electron microscopy (SEM) during the past 10 years has been the development and application of digital imaging technology. Advancements in technology, notably the availability of less expensive, high-density memory chips and the development of high speed analog-to-digital converters, mass storage and high performance central processing units have fostered this revolution. Today, most modern SEM instruments have digital electronics as a standard feature. These instruments, generally have 8 bit or 256 gray levels with, at least, 512 × 512 pixel density operating at TV rate. In addition, current slow-scan commercial frame-grabber cards, directly applicable to the SEM, can have upwards of 12-14 bit lateral resolution permitting image acquisition at 4096 × 4096 resolution or greater. The two major categories of SEM systems to which digital technology have been applied are:In the analog SEM system the scan generator is normally operated in an analog manner and the image is displayed in an analog or "slow scan" mode.

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Frequency response of an internal amplifier in a high-speed integrated circuit measured by electro-optic sampling

Electronics Letters ◽

10.1049/el:19880070 ◽

1988 ◽

Vol 24 (2) ◽

pp. 106 ◽

Cited By ~ 11

Author(s):

J.M. Wiesenfeld ◽

M.S. Heutmaker

Keyword(s):

Frequency Response ◽

Integrated Circuit ◽

High Speed ◽

Electro Optic

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High-speed electro-optic switch using buried electrode structure in polymer Mach–Zehnder waveguide

Modern Physics Letters B ◽

10.1142/s0217984916500639 ◽

2016 ◽

Vol 30 (06) ◽

pp. 1650063 ◽

Cited By ~ 1

Author(s):

Jingwen Sun ◽

Jian Sun ◽

Yunji Yi ◽

Lucheng Qv ◽

Shiqi Sun ◽

...

Keyword(s):

Insertion Loss ◽

Rise Time ◽

High Speed ◽

Low Cost ◽

Characteristic Parameters ◽

Electrode Structure ◽

Processing Cost ◽

Electro Optic ◽

Disperse Red 1 ◽

Excellent Photostability

A low-cost and high-speed electro-optic (EO) switch using the guest–host EO material Disperse Red 1/Polymethyl Methacrylate (DR1/PMMA) was designed and fabricated. The DR1/PMMA material presented a low processing cost, an excellent photostability and a large EO coefficient of 13.1 pm/V. To improve the performance of the switch, the in-plane buried electrode structure was introduced in the polymer Mach–Zehnder waveguide to improve the poling and modulating efficiency. The characteristic parameters of the waveguide and the electrodes were carefully designed and the fabrication process was strictly controlled. Under 1550 nm, the insertion loss of the device was 12.7 dB. The measured switching rise time and fall time of the switch were 50.00 ns and 54.29 ns, respectively.

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A New Method to Verify the Measurement Speed and Accuracy of Frequency Modulated Interferometers

Applied Sciences ◽

10.3390/app11135787 ◽

2021 ◽

Vol 11 (13) ◽

pp. 5787

Author(s):

Toan-Thang Vu ◽

Thanh-Tung Vu ◽

Van-Doanh Tran ◽

Thanh-Dong Nguyen ◽

Ngoc-Tam Bui

Keyword(s):

Phase Change ◽

High Speed ◽

Measurement Accuracy ◽

Slow Motion ◽

New Method ◽

Virtual Displacement ◽

Electro Optic ◽

Lock In ◽

Speed And Accuracy ◽

Electro Optic Modulator

The measurement speed and measurement accuracy of a displacement measuring interferometer are key parameters. To verify these parameters, a fast and high-accuracy motion is required. However, the displacement induced by a mechanical actuator generates disadvantageous features, such as slow motion, hysteresis, distortion, and vibration. This paper proposes a new method for a nonmechanical high-speed motion using an electro-optic modulator (EOM). The method is based on the principle that all displacement measuring interferometers measure the phase change to calculate the displacement. This means that the EOM can be used to accurately generate phase change rather than a mechanical actuator. The proposed method is then validated by placing the EOM into an arm of a frequency modulation interferometer. By using two lock-in amplifiers, the phase change in an EOM and, hence, the corresponding virtual displacement could be measured by the interferometer. The measurement showed that the system could achieve a displacement at 20 kHz, a speed of 6.08 mm/s, and a displacement noise level < 100 pm//√Hz above 2 kHz. The proposed virtual displacement can be applied to determine both the measurement speed and accuracy of displacement measuring interferometers, such as homodyne interferometers, heterodyne interferometers, and frequency modulated interferometers.

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A Low-Power 12-Bit 20 MS/s Asynchronously Controlled SAR ADC for WAVE ITS Sensor Based Applications

Sensors ◽

10.3390/s21072260 ◽

2021 ◽

Vol 21 (7) ◽

pp. 2260

Author(s):

Khuram Shehzad ◽

Deeksha Verma ◽

Danial Khan ◽

Qurat Ul Ain ◽

Muhammad Basim ◽

...

Keyword(s):

Power Consumption ◽

Low Power ◽

High Speed ◽

Intelligent Transportation System ◽

Cmos Process ◽

Process Technology ◽

Back Issue ◽

Digital To Analog Converter ◽

Analog To Digital ◽

Switching Method

A low power 12-bit, 20 MS/s asynchronously controlled successive approximation register (SAR) analog-to-digital converter (ADC) to be used in wireless access for vehicular environment (WAVE) intelligent transportation system (ITS) sensor based application is presented in this paper. To optimize the architecture with respect to power consumption and performance, several techniques are proposed. A switching method which employs the common mode charge recovery (CMCR) switching process is presented for capacitive digital-to-analog converter (CDAC) part to lower the switching energy. The switching technique proposed in our work consumes 56.3% less energy in comparison with conventional CMCR switching method. For high speed operation with low power consumption and to overcome the kick back issue in the comparator part, a mutated dynamic-latch comparator with cascode is implemented. In addition, to optimize the flexibility relating to the performance of logic part, an asynchronous topology is employed. The structure is fabricated in 65 nm CMOS process technology with an active area of 0.14 mm2. With a sampling frequency of 20 MS/s, the proposed architecture attains signal-to-noise distortion ratio (SNDR) of 65.44 dB at Nyquist frequency while consuming only 472.2 µW with 1 V power supply.

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