DESIGN AUTOMATION FOR MULTICHIP MODULE — ISSUES AND STATUS

1991 ◽  
Vol 02 (04) ◽  
pp. 263-285 ◽  
Author(s):  
PHILIP C. CHAN

In this paper we will review the current state of commercial electronic design automation (EDA) tools for the design of multichip modules. MCM can be classified in terms of its substrate technology. The choice of substrate technology has important implications for the selection of design automation tools. A PCB EDA system seems more appropriate for MCMs with stacked via substrate which closely resembles the through-hole printed circuit board (PCB). A chip layout system may be more appropriate for MCMs with low-cost thin-film silicon substrate which typically uses staircase vias. The cofired ceramic substrate MCM which evolved from the hybrid integrated circuit technology may use the specialized hybrid EDA software packages available for the designing of hybrid integrated circuits. Historically, printed circuit board and integrated circuit design automation software evolved separately. There exists a boundary between the printed circuit board and integrated circuit design automation tools in the physical design hierarchy. This boundary can be an important limitation for the repartitioning of the physical design hierarchy within the MCM. We shall discuss in detail the impact of MCM on various aspects of EDA. In the area of physical design, we must face the traditional placement and routing problem for any high speed design. Problems such as system clock skew and tight timing requirements must be considered. As one push clock frequency higher, one also must consider discontinuities due to vias and bends besides the classical transmission line effect due to long wires. Other traditional physical design problems such as ground and power plane generation, physical design verification and mask tooling must be revisited in the context of various MCM substrate technologies. The thermal aspects of MCM design are strongly influenced by the placement of chips on the MCM substrate. Thermal design is especially important for high density MCMs using the flip-chip mounting technology. Here, the heat must be dissipated through the back of the substrate via thermal pillars or bumps. We still need to deal with the traditional coupled transmission line problems. Due to the small cross section, high performance MCM substrate interconnects are resistive and the transmission lines they form are lossy. Noise is another main problem for MCM design. For high speed MCM with many CMOS buffers, the ground bouncing noise resulting from simultaneous switching of a large number of CMOS drivers must be controlled through proper substrate and package design. We will conclude the paper by comparing existing VLSI and PCB EDA tools for MCM design.

Author(s):  
William Ng ◽  
Kevin Weaver ◽  
Zachary Gemmill ◽  
Herve Deslandes ◽  
Rudolf Schlangen

Abstract This paper demonstrates the use of a real time lock-in thermography (LIT) system to non-destructively characterize thermal events prior to the failing of an integrated circuit (IC) device. A case study using a packaged IC mounted on printed circuit board (PCB) is presented. The result validated the failing model by observing the thermal signature on the package. Subsequent analysis from the backside of the IC identified a hot spot in internal circuitry sensitive to varying value of external discrete component (inductor) on PCB.


2013 ◽  
Vol 333-335 ◽  
pp. 465-471
Author(s):  
Chuan Liu ◽  
Zhi Chao Huang ◽  
Peng Wu ◽  
Lei Chen ◽  
Wei Wang

Many applications in Power communication system have a demand of adjustable transmission time delay of high-speed signal. In sequential logic circuit, the control of transmission time delay of high-speed signal can effectively improve the accuracy of clock sampling, as a result, satisfy the constraints between clock signal and periodic data. A method of equivalent sampling based on printed circuit board (PCB) is provided in the article, it realizes equivalent sampling of the data by fixing a group of clock signal delay, thus, increase the accuracy of sampling.


Circuit World ◽  
2020 ◽  
Vol 46 (3) ◽  
pp. 215-219
Author(s):  
Akhendra Kumar Padavala ◽  
Narayana Kiran Akondi ◽  
Bheema Rao Nistala

Purpose This paper aims to present an efficient method to improve quality factor of printed fractal inductors based on electromagnetic band-gap (EBG) surface. Design/methodology/approach Hilbert fractal inductor is designed and simulated using high-frequency structural simulator. To improve the quality factor, an EBG surface underneath the inductor is incorporated without any degradation in inductance value. Findings The proposed inductor and Q factor are measured based on well-known three-dimensional simulator, and the results are compared experimentally. Practical implications The proposed method was able to significantly decrease the noise with increase in the speed of radio frequency and sensor-integrated circuit design. Originality/value Fractal inductor is designed and simulated with and without EBG surfaces. The measurement of printed circuit board prototypes demonstrates that the inclusion of split-ring array as EBG surface increases the quality factor by 90 per cent over standard fractal inductor of the same dimensions with a small degradation in inductance value and is capable of operating up to 2.4 GHz frequency range.


2019 ◽  
Vol 13 (6) ◽  
pp. 805-811 ◽  
Author(s):  
Neethu Salim ◽  
Saurabh Prakash Nikam ◽  
Saumitra Pal ◽  
Ashok Krishnrao Wankhede ◽  
Baylon Godfrey Fernandes

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