A New Transresistance-Mode Instrumentation Amplifier with Low Number of MOS Transistors and Electronic Tuning Opportunity

2016 ◽  
Vol 25 (04) ◽  
pp. 1650022 ◽  
Author(s):  
Leila Safari ◽  
Erkan Yuce ◽  
Shahram Minaei
Keyword(s):  
Simple Structure ◽  
Time Domain Analysis ◽  
Instrumentation Amplifier ◽  
Mos Transistors ◽  
Differential Mode ◽  
Robust Performance ◽  
Chip Area ◽  
Input And Output ◽  
Maximum Value ◽  
Electronic Tuning

In this paper, the simplest possible electronically adjustable transresistance-mode (TRM) instrumentation amplifier (IA) using only eight MOS transistors is presented. Extremely simple structure of the proposed IA leads to a wide bandwidth and robust performance against mismatches and parasitic capacitances. Of more interest is that the differential-mode gain of the proposed IA can be electronically varied by control voltages. Post-layout and pre-layout simulation results based on 0.18[Formula: see text][Formula: see text]m TSMC CMOS parameters are included to confirm the validity of the theoretical analysis. Despite extremely simple structure, its input and output impedances are 1.93 and 1.68[Formula: see text]k[Formula: see text], respectively. Time domain analysis shows that for an input signal of 20[Formula: see text][Formula: see text]A peak to peak, maximum value of THD is 4.5% for different frequencies. Monte Carlo simulation is also carried out, which proves robust performance of the proposed IA against mismatches. The required chip area is only [Formula: see text].

Optimization for Design of PID Controller Based on Improved PSO

2011 ◽  
Vol 181-182 ◽  
pp. 571-576
Author(s):  
Jin Zhu ◽  
Wei Kang ◽  
Xiu Mei Zhang
Keyword(s):  
Pid Controller ◽  
Simple Structure ◽  
Pso Algorithm ◽  
The Other ◽  
Robust Performance ◽  
Improved Pso

A new algorithm which is the average local best position is presented to replace the local best of the traditional velocity update rule. One particle can acquire more messages of the other particles to adjust is movement in this method. Integrating PSO algorithm with PID controller, the three parameters of the PID controller can be optimized, which has the features of simple structure, easy implementation and robust performance. The simulation shows the PID controller integrated with the improved PSO algorithm achieved a good performance.

A Digital-Based Ultra-Low-Voltage Pseudo-Differential CMOS Schmitt Trigger

2019 ◽  
Vol 29 (04) ◽  
pp. 2020002
Author(s):  
Yasin Bastan ◽  
Parviz Amiri
Keyword(s):  
Integrated Circuit ◽  
Low Voltage ◽  
Design Procedure ◽  
Schmitt Trigger ◽  
Input Voltage ◽  
Cmos Process ◽  
Differential Mode ◽  
Digital Cmos ◽  
Hysteresis Width ◽  
Chip Area

A digital-based Pseudo-differential Schmitt trigger is proposed in this paper which is suitable for ultra-low voltages and pure digital integrated circuit technologies. The proposed Schmitt trigger is implemented according to the design procedure of an analog Schmitt trigger and only using digital CMOS inverters. It is composed of a differential comparator consisting of two CMOS inverters and a cross-coupled inverter pair positive feedback which has simultaneously two outputs of noninverting and inverting. The proposed circuit is the only digital Schmitt trigger which operates in differential mode and its hysteresis center can be changed by the input voltage. Implementing the circuit in digital-based allows the proposed Schmitt trigger to operate in 0.4[Formula: see text]V ultra-low-voltage. Principle operation of the proposed circuit is discussed theoretically and using formulas and its performance is verified by simulation in TSMC 0.18[Formula: see text][Formula: see text]m CMOS process. The proposed circuit occupies only [Formula: see text][Formula: see text][Formula: see text]m2 chip area due to the very low number of transistors. The hysteresis width of the proposed Schmitt trigger is 205[Formula: see text]mV and consumes only 6.64[Formula: see text]nW power.

scholarly journals Boom motion trajectory generation approach for load sway rejection in rotary cranes considering double-pendulum effect

2020 ◽  
pp. 002029402094496
Author(s):  
Huimin Ouyang ◽  
Xiang Xu ◽  
Guangming Zhang
Keyword(s):  
Simple Structure ◽  
Double Pendulum ◽  
Motion Trajectory ◽  
Robust Performance ◽  
Excellent Performance ◽  
Simulation Data ◽  
Barbalat’S Lemma ◽  
Rotary Crane ◽  
Control Research ◽  
Invariance Theorem

In the control research on the rotary crane systems with double-pendulum effect, a motion trajectory with both simple structure and excellent robust performance is proposed to achieve the positioning of the boom and the suppression of the load sway. The presented trajectory consists of an anti-swing component and a boom positioning component, where the first part is used to achieve the sway angle elimination without affecting boom positioning; the second one is used to move the boom to the desired location precisely. The Lyapunov technique, LaSalle’s invariance theorem, and Barbalat’s lemma are used to prove the excellent performance of the method. Eventually, the effectiveness of the proposed method was verified through a large amount of simulation data analysis.

Mathematical Modelling and Simulation of Simple Phase Locked Loop for Distributed Grid Application

2020 ◽  
Vol 17 (5) ◽  
pp. 2349-2353
Author(s):  
P. Venkatesh Kumar ◽  
S. Anbumalar ◽  
V. Yamini
Keyword(s):  
Simple Structure ◽  
Phase Locked Loop ◽  
Phase Detection ◽  
Robust Performance ◽  
Effective Performance ◽  
Simulation Results ◽  
Grid Application ◽  
Simple Phase ◽  
Mathematical Modelling And Simulation ◽  
Fast Dynamic

The purpose of this paper is to model a simple phase locked loop for grid application. One of the most challenging issues is the phase detection for grid application. The signal estimator with PLL is used for better phase detection which has a simple structure and gives fast dynamic response for grid application with robust performance. The simulation results show the effective performance of the proposed PLL.

Multiplier-Free IIR Filter Realizations with Periodically Time-Varying Coefficients

1997 ◽  
Vol 07 (04) ◽  
pp. 231-248
Author(s):  
Sawasd Tantaratana
Keyword(s):  
Processing Speed ◽  
Vlsi Design ◽  
Fir Filters ◽  
Time Varying ◽  
Chip Area ◽  
Varying Coefficients ◽  
Iir Filter ◽  
Input And Output ◽  
Time Varying Coefficients

In this paper, the periodically time-varying (PTV) structure, previously proposed for realizing FIR filters, is extended to IIR filter realization. The realization consists of ternary ({0, ±1}) or quinary ({0, ±1, ±2}) PTV coefficients with simple input and output units. Coefficient multiplications as well as the input and output units require no hardware multiplier, which helps increase the processing speed or reduce the chip area. Bit-level architectures are presented. The regularity and local interconnection of the architectures help simplify VLSI design and layout.

scholarly journals A Compact Low-Offset Instrumentation Amplifier with Wide Input and Output Ranges

2017 ◽  
pp. 347-354
Author(s):  
Massimo Piotto ◽  
Simone Del Cesta ◽  
Giovanni Argenio ◽  
Roberto Simmarano ◽  
Paolo Bruschi
Keyword(s):  
Instrumentation Amplifier ◽  
Input And Output ◽  
Low Offset

Current mode instrumentation amplifier with rail-to-rail input and output

2008 ◽  
Vol 57 (1-2) ◽  
pp. 29-37 ◽  
Author(s):  
Filipe Costa Beber Vieira ◽  
Cesar Augusto Prior ◽  
Cesar Ramos Rodrigues ◽  
Leonardo Perin ◽  
João Baptista dos Santos Martins
Keyword(s):  
Current Mode ◽  
Instrumentation Amplifier ◽  
Input And Output ◽  
Rail To Rail

MOS Only Grounded Active Inductor Circuits and Their Filter Applications

2017 ◽  
Vol 26 (06) ◽  
pp. 1750098 ◽  
Author(s):  
Mustafa Konal ◽  
Firat Kacar
Keyword(s):  
Low Noise ◽  
Active Inductor ◽  
Cmos Process ◽  
Band Pass Filter ◽  
Mos Transistors ◽  
Pass Filter ◽  
Chip Area ◽  
Active Inductors ◽  
Band Pass ◽  
Filter Structures

This paper presents two grounded MOS only active inductor circuits. Both circuits have only two MOS transistors and two biasing currents. Thus, the proposed active inductors provide small chip area, tunability, low power consumption with 150[Formula: see text][Formula: see text]W and 90[Formula: see text][Formula: see text]W, respectively. To analyze their performance, a second-order band-pass filter and a third-order high-pass filter structures are presented with low noise as 7.5[Formula: see text]nV/[Formula: see text] and 9.14[Formula: see text]nV/[Formula: see text], respectively. The designed active inductors and filters are simulated in 0.18[Formula: see text][Formula: see text]m CMOS process parameters using LTSPICE.

A 5GHz Analog Laser Diode Driver for Radio-over-Fiber Transmission Applications

2014 ◽  
Vol 635-637 ◽  
pp. 1063-1066
Author(s):  
Zheng Fei Hu ◽  
Ying Mei Chen ◽  
Min Di Huang
Keyword(s):  
Power Consumption ◽  
Laser Diode ◽  
Gate Oxide ◽  
Radio Over Fiber ◽  
Power Gain ◽  
Chip Area ◽  
Oxide Breakdown ◽  
Input And Output ◽  
Simulation Results ◽  
On Chip

The design of an analog laser diode (LD) driver for 5GHz radio-over-fiber (ROF) transmission systems is presented in this paper. The proposed linear LD driver adopted a single-ended two-stage amplifier structure with the operating voltages of 1.8V and 3.3V respectively. The technique of self-biased cascade amplifier is employed to increase the gain and alleviate the danger of gate oxide breakdown. The simulation results show that the analog amplifier achieves the power gain of 35dB and the output 1dB compression point of 18dBm at 5GHz. The corresponding output modulation current is up to 50mA at the 1dB compression point. The total chip area is only 710μm×580μm with the all on chip input and output matching network, and the power consumption is 130mW.

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