SILICON NANOWIRE TRANSISTOR FABRICATED BY AFM NANOLITHOGRAPHY FOLLOWED BY WET CHEMICAL ETCHING PROCESS

2010 ◽  
Vol 09 (04) ◽  
pp. 289-293 ◽  
Author(s):  
K. C. LEW ◽  
SABAR D. HUTAGALUNG

Atomic force microscope (AFM) nanolithography was performed to create nanowire transistor pattern via local anodic oxidation process on surface of silicon-on-insulator (SOI) wafer. This nanoscale oxide pattern is used as a mask system for chemical etching to produce silicon nanowire transistor. The device with component structures of a silicon nanowire (SiNW) as channel with source, drain, and gate pads had been drawn at 9 V tip voltage, 6 μm/s writing speed with humidity 55.8–68.9%RH. The designed device was etched with tetramethylammonium hydroxide (TMAH) to remove uncovered silicon layer but oxide pattern remains. In order to obtain SiNW transistor, sample was etched using hydrogen fluoride (HF) to remove oxide layer. From the AFM and field emission scanning electron microscope (FESEM) observation found that the SiNW transistor with wire size of 92.65 nm in wire thickness, 90.83 nm wire width and 10.30 μm in length with contact pads size of about 5 μ m × 5 μ m has been successfully fabricated.

2011 ◽  
Vol 277 ◽  
pp. 84-89 ◽  
Author(s):  
Sabar Derita Hutagalung ◽  
Kam C. Lew

Silicon nanowire transistor (SiNWT) was fabricated by using a silicon nanowire as a channel which directly connected to the source (S) and drain (D). In this work, a side gate (G) formation was used to develop a transistor structure. AFM lithography was performed to create the nanoscale oxide patterns via local anodic oxidation (LAO) mechanism. A conductive AFM tip was used to grow localized oxide layer on the surface of silicon on insulator (SOI) substrate by the application of voltage between tip and substrate. Other parameters that will influence the patterning process such as tip writing speed, relative air humidity, anodization time and substrate orientation were controlled. The patterned structure was etched with tetramethylammonium hydroxide (TMAH) and hydrogen fluoride (HF) acid to remove the uncovered silicon layer and silicon oxide mask patterns, respectively. The surface topography and dimension of the fabricated SiNWT was observed under AFM. Obtained results for the channel thickness, channel length and the distance between the channel and side gate are 32.92 nm, 7.63 µm and 108.07 nm, respectively. Meanwhile, the I-V characteristics of fabricated SiNWT measured at positive gate voltages are similar to p-type FET characteristics.


Materials ◽  
2021 ◽  
Vol 14 (19) ◽  
pp. 5716
Author(s):  
Siti Noorhaniah Yusoh ◽  
Khatijah Aisha Yaacob

SiNW (silicon nanowire) arrays consisting of 5- and 10-wires were fabricated by using an atomic force microscope—the local anodic oxidation (AFM-LAO) technique followed by wet chemical etching. Tetramethylammonium hydroxide (TMAH) and isopropyl alcohol (IPA) at various concentrations were used to etch SiNWs. The SiNWs produced were differed in dimension and surface roughness. The SiNWs were functionalized and used for the detection of deoxyribonucleic acid (DNA) dengue (DEN-1). SiNW-based biosensors show sensitive detection of dengue DNA due to certain factors. The physical properties of SiNWs, such as the number of wires, the dimensions of wires, and surface roughness, were found to influence the sensitivity of the biosensor device. The SiNW biosensor device with 10 wires, a larger surface-to-volume ratio, and a rough surface is the most sensitive device, with a 1.93 fM limit of detection (LOD).


Nano Hybrids ◽  
2013 ◽  
Vol 3 ◽  
pp. 93-113 ◽  
Author(s):  
Arash Dehzangi ◽  
Farhad Larki ◽  
Jumiah Hassan ◽  
Sabar D. Hutagalung ◽  
Elias B. Saion ◽  
...  

In this work, we have investigated the fabrication of Double gate and Single gate Junctionless silicon nanowire transistor using silicon nanowire patterned on lightly doped (105 cm-3) p-type Silicon on insulator wafer fabricated by Atomic force microscopy nanolithography technique. Local anodic oxidation followed by two wet etching steps, Potassium hydroxide etching for Silicon removal and Hydrofluoric acid etching for oxide removal, were implemented to reach the structures. Writing speed and applied tip voltage were held in 0.6 µm/s and 8 volt respectively for Cr/Pt tip. Scan speed was held in 1.0 µm/s. The etching processes were elaborately performed and optimized by 30%wt. Potassium hydroxide + 10%vol. Isopropyl alcohol in appropriate time, temperature and humidity. The structure is a gated resistor turned off based on a pinch-off effect principle, when essential positive gate voltage is applied. Negative gate voltage was unable to make significant effect on drain current to drive the device into accumulation mode.


2012 ◽  
Vol 2012 ◽  
pp. 1-8 ◽  
Author(s):  
Chien-Wei Liu ◽  
Chin-Lung Cheng ◽  
Bau-Tong Dai ◽  
Chi-Han Yang ◽  
Jun-Yuan Wang

Nanostructured solar cells with coaxial p-n junction structures have strong potential to enhance the performances of the silicon-based solar cells. This study demonstrates a radial junction silicon nanowire (RJSNW) solar cell that was fabricated simply and at low cost using wet chemical etching. Experimental results reveal that the reflectance of the silicon nanowires (SNWs) declines as their length increases. The excellent light trapping was mainly associated with high aspect ratio of the SNW arrays. A conversion efficiency of ∼7.1% and an external quantum efficiency of ∼64.6% at 700 nm were demonstrated. Control of etching time and diffusion conditions holds great promise for the development of future RJSNW solar cells. Improving the electrode/RJSNW contact will promote the collection of carries in coaxial core-shell SNW array solar cells.


2016 ◽  
Author(s):  
A. Belov ◽  
Yu. Chaplygin ◽  
S. Lemeshko ◽  
I. Sagunova ◽  
V. Shevyakov

1999 ◽  
Vol 587 ◽  
Author(s):  
G. C. Spalding ◽  
W. L. Murphy ◽  
T. M. Davidsmeier ◽  
J. E. Elenewski

AbstractWe use an Atomic Force Microscope (AFM) to study changes in the surface of single-crystal SrTiO3 etched in HF-based solutions. Attention in this work has been focused upon observations of pyramidal pitting – both because of an interest in avoiding etch pits during substrate preparation prior to heteroepitaxial growth, and because of an interest in micromachining this highly polarizable material. We note that (110) SrTiO3 is surprisingly robust against the formation of pits, while pitting is significant on {100} surfaces. Particular etch rates have been measured, and we discuss anisotropies in the rates of dissolution. These data are combined to extract a macroscopic model describing processes relevant to the most extreme pitting, which we show to be associated with surface defects.


2020 ◽  
Vol 301 ◽  
pp. 103-110
Author(s):  
Nurain Najihah Alias ◽  
Khatijah Aisha Yaacob ◽  
Kuan Yew Cheong

The unique electrical properties of silicon nanowires (SiNWs) is one of the reasons it become an attractive transducer for biosensor nowadays. Positive (holes) and negative (electron) charge carriers from SiNWs can simply interact with either positive or negative charge of sensing target. In this paper, we have studied the fabrication of silicon nanowires field effect transistor (SiNWs-FET) nanostructure patterned on 15 Ω resistivity of p-type silicon on insulator (SOI) wafer fabricated via atomic force microscopy lithography technique. To fabricate SiNWs-FET nanostructure, a conductive AFM tip, Cr/Pt cantilever tip, was used then various value of applied voltage, writing speed and relative humidity were studied. Subsequent, followed by wet etching processes, admixture of tetramethylammonium hydroxide (TMAH) and isopropyl alcohol (IPA) were used to remove the undesired of silicon layer and diluted hydrofluoric acid (HF) was used to remove the oxide layer. From the results, it shows that, cantilever tip at 9 V with 0.4 μm/s writing speed and relative humidity between 55% - 60% gives the best formation of silicon oxide to fabricate SiNWs-FET nanostructure.


Sign in / Sign up

Export Citation Format

Share Document