Impact of X-ray Radiation on SOI MOSFET: Insulator Film Degradation and Hot-Carrier Reliability

2018 ◽  
Vol 85 (8) ◽  
pp. 59-64 ◽  
Author(s):  
Yasuhisa Omura
Keyword(s):  
X Ray ◽  
1993 ◽  
Vol 306 ◽  
Author(s):  
A. J. Lelis ◽  
T. R. Oldham

AbstractInvestigations of submicron-channel-length n- and p-channel MOSFETs subjected to channel hot-carrier stressing were performed, comparing the reliability of devices with and without exposure to simulated x-ray lithography processing steps. No significant differences were observed between the sample groups.


2015 ◽  
Vol 10 (1) ◽  
pp. 43-48
Author(s):  
Leonardo N. de S. Fino ◽  
Marcilei A. Guazzelli ◽  
Christian Renaux ◽  
Denis Flandre ◽  
Salvador P. Gimenez

This work investigates the X-ray irradiation impact on the performance of an on-conventional transistor called OCTO SOI MOSFET that adopts an octagonal gate shape instead of a rectangular. The electrical behaviors of both devices were studied through an experimental comparative analysis of the total ionizing dose influence. In addition, the back-gate bias technique was applied in these devices to reestablish its threshold voltages and drain currents conditions that were degraded due the trapping of positive charges in the buried oxide. As the main finding of this work, after the irradiation procedure, we notice that the OCTO device is capable to reestablish its pre-rad electrical behavior with a smaller back gate bias than the one observed in the standard one counterpart. This is mainly because the parasitic transistors in the bird’s beak region are practically deactivated due the particular octagonal gate geometry.


2013 ◽  
Vol 2013 ◽  
pp. 1-6 ◽  
Author(s):  
Mohammad K. Anvarifard ◽  
Ali A. Orouji

In this paper a comprehensive investigation of a novel device called split-gate silicon-on-insulator MOSFET (SPG SOI MOSFET) is proposed to reduce short-channel effects (SCEs). Studying the device has been done by analytical approach and simulation. In the proposed structure the gate is split into two parts. A voltage difference exists between the two parts. It is demonstrated that the surface potential in the channel region exhibits a step function. Some improvements are obtained on parameters such as SCEs, hot-carrier effect (HCE), and drain-induced barrier lowering (DIBL). The accuracy of the results obtained by use of the analytical model is verified by ATLAS device simulation software. The obtained results of the model are compared with those of the single-gate (SG) SOI MOSFET. The simulation results show that the SPG SOI MOSFET performance is superior.


2008 ◽  
Vol 55 (6) ◽  
pp. 3216-3223 ◽  
Author(s):  
M. Silvestri ◽  
S. Gerardin ◽  
A. Paccagnella ◽  
F. Faccio
Keyword(s):  
X Ray ◽  

1998 ◽  
Vol 27 (8) ◽  
pp. 936-940 ◽  
Author(s):  
Yuusuke Tanaka ◽  
Akira Tanabe ◽  
Katsumi Suzuki ◽  
Tsutomu Miyatake ◽  
Masaki Hirose

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