scholarly journals A New CMOS Controllable Impedance Multiplier with Large Multiplication Factor

2017 ◽  
Vol 2017 ◽  
pp. 1-6 ◽  
Author(s):  
Munir A. Al-Absi
Keyword(s):  
Cmos Technology ◽  
Cmos Process ◽  
Multiplication Factor ◽  
Process Technology ◽  
Subthreshold Region ◽  
Low Pass ◽  
Simulation Results ◽  
High Pass

This paper presents a new compact controllable impedance multiplier using CMOS technology. The design is based on the use of the translinear principle using MOSFETs in subthreshold region. The value of the impedance will be controlled using the bias currents only. The impedance can be scaled up and down as required. The functionality of the proposed design was confirmed by simulation using BSIM3V3 MOS model in Tanner Tspice 0.18 μm TSMC CMOS process technology. Simulation results indicate that the proposed design is functioning properly with a tunable multiplication factor from 0.1- to 100-fold. Applications of the proposed multiplier in the design of low pass and high pass filters are also included.

Improved Electronically-Tunable Current-Mode Square-Root-Domain First-Order Multifunction Filter

2021 ◽  
pp. 2150190
Author(s):  
Manoj Kumar Jain
Keyword(s):  
Transient Response ◽  
Current Mode ◽  
Square Root ◽  
Spice Simulation ◽  
First Order ◽  
Low Pass ◽  
Multifunction Filter ◽  
Simulation Results ◽  
Electronically Tunable ◽  
High Pass

Some time back, Kircay reported an electronically-tunable current-mode square-root-domain first-order filter capable of realizing low-pass (LP), high-pass (HP) and all-pass (AP) filter functions. When simulated in SPICE, Kircay’s circuit has been found to exhibit DC offsets in case of LP and AP responses and incorrect transient response in case of HP response. In this paper, an improved circuit overcoming these difficulties/deficiencies has been suggested and its workability of the improved circuit as well as its capability in meeting the intended objectives has been demonstrated by SPICE simulation results.

scholarly journals DIGITAL CONTROLLED OSCILLATOR (DCO) FOR ALL DIGITAL PHASE-LOCKED LOOP (ADPLL) – A REVIEW

2019 ◽  
Vol 82 (1) ◽  
Author(s):  
Florence Choong ◽  
Mamun Ibne Reaz ◽  
Mohamad Ibrahim Kamaruzzaman ◽  
Md. Torikul Islam Badal ◽  
Araf Farayez ◽  
...  
Keyword(s):  
Supply Voltage ◽  
Complementary Metal Oxide Semiconductor ◽  
Phase Locked Loop ◽  
Cmos Technology ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Process Technology ◽  
Chip Area ◽  
Digital Phase ◽  
Low Power Dissipation

Digital controlled oscillator (DCO) is becoming an attractive replacement over the voltage control oscillator (VCO) with the advances of digital intensive research on all-digital phase locked-loop (ADPLL) in complementary metal-oxide semiconductor (CMOS) process technology. This paper presents a review of various CMOS DCO schemes implemented in ADPLL and relationship between the DCO parameters with ADPLL performance. The DCO architecture evaluated through its power consumption, speed, chip area, frequency range, supply voltage, portability and resolution. It can be concluded that even though there are various schemes of DCO that have been implemented for ADPLL, the selection of the DCO is frequently based on the ADPLL applications and the complexity of the scheme. The demand for the low power dissipation and high resolution DCO in CMOS technology shall remain a challenging and active area of research for years to come. Thus, this review shall work as a guideline for the researchers who wish to work on all digital PLL.

MIXED MODE UNIVERSAL FILTER

2013 ◽  
Vol 22 (01) ◽  
pp. 1250064 ◽  
Author(s):  
NEETA PANDEY ◽  
SAJAL K. PAUL
Keyword(s):  
Mixed Mode ◽  
Cmos Technology ◽  
Output Impedance ◽  
Universal Filter ◽  
Output Current ◽  
Voltage Signal ◽  
Low Pass ◽  
Band Pass ◽  
Electronically Tunable ◽  
High Pass

The configuration with electronic tunable characteristics that can work in mixed mode may be useful from IC realization viewpoint and application adaptability. This paper proposes an electronically tunable mixed mode universal filter based on multiple output current controlled current conveyor (MOCCCII) and this single topology without any alteration can be used in all four modes i.e., voltage (VM), current (CM), transimpedance (TIM) and transadmittance (TAM). The architecture uses four MOCCCIIs and two grounded capacitors; and can realize universal filter functions — low pass (LP), band pass (BP), high pass (HP), notch (NF) and all pass (AP) for all four modes. Moreover the input impedance is high and output impedance is low for voltage signal and vice-versa for current signal, hence the proposed topology is suitable for cascading for all four modes. The workability of the proposed circuit has been verified via SPICE simulations using AMS 0.35 μm CMOS technology.

The Design of Gm-C Low-Pass Filter for Micromachined Gyroscope

2014 ◽  
Vol 609-610 ◽  
pp. 1072-1076
Author(s):  
Qiu Ye Lv ◽  
Chong He ◽  
Wen Jie Fan ◽  
Yu Feng Zhang ◽  
Xiao Wei Liu
Keyword(s):  
Process Model ◽  
Stop Band ◽  
Cutoff Frequency ◽  
Harmonic Distortion ◽  
Cmos Process ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Low Pass ◽  
Simulation Results ◽  
Micromachined Gyroscope

In this Paper, a 4th-Order Low-Pass Gm-C Filter is Presented. for the Design of Operational Tranconductance Amplifier(OTA), it Adopts the Techniques of Current Division and Current Cancellation. these Techniques can Help to Achieve a Low Transconductance Value. for the Architecture of the 4th-Order Gm-C Filter, it Consists of Two Biquads. the Two Biquads are Cascade Connected. the Gm-C Low-Pass Filter has been Implemented under 0.5 μm CMOS Process Model. the Final Simulation Results Show the Cutoff Frequency of the Filter is 100Hz and the Stop-Band Attenuation is Larger than 60dB. the Power Consumption is Lower than 1mW and the Total Harmonic Distortion(THD) is -55dB.

A New CCII Based Voltage-Mode Multifunctional Filter with Reduced Number of Active and Passive Elements

2015 ◽  
Vol 24 (04) ◽  
pp. 1550047 ◽  
Author(s):  
Firat Yucel ◽  
Erkan Yuce
Keyword(s):  
Time Domain ◽  
Input Impedance ◽  
Current Conveyors ◽  
High Input ◽  
High Input Impedance ◽  
Voltage Mode ◽  
Low Pass ◽  
Band Pass ◽  
Simulation Results ◽  
High Pass

In this paper, a new voltage-mode (VM) multifunctional filter comprising two second-generation current conveyors (CCIIs) is proposed. The proposed filter with one input and three outputs is also composed of three resistors and two grounded capacitors. The proposed filter has high input impedance; thus, it can be easily connected with other VM circuits. The proposed filter can simultaneously provide low-pass (LP), band-pass (BP) and high-pass (HP) responses. A number of time domain and frequency domain simulation results are included to confirm the claimed theory.

scholarly journals CMOS CDBA-Based Inverse Filter Structure

2020 ◽  
Vol 9 (3) ◽  
pp. 2226-2231
Keyword(s):  
Cmos Technology ◽  
Experimental Results ◽  
Band Pass Filter ◽  
Inverse Filter ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Filter Structure ◽  
Low Pass ◽  
Band Pass ◽  
High Pass

This paper presents a voltage-mode(VM) tunable multifunction inverse filter configuration employing current differencing buffered amplifiers (CDBA). The presented structure utilizes two CDBAs, two/three capacitors and four/five resistors to realize inverse low pass filter (ILPF), inverse high pass filter (IHPF), inverse band pass filter (IBPF), and inverse band reject filter(IBRF) from the same circuit topology by suitable selection(s) of the branch admittances(s). PSPICE simulations have been performed with 0.18µm TSMC CMOS technology to validate the theory. Some sample experimental results have also been provided using off-the-shelf IC AD844 based CDBA.

FIRST-ORDER MEMRISTOR–CAPACITOR FILTER CIRCUITS EMPLOYING HP MEMRISTOR

2014 ◽  
Vol 23 (08) ◽  
pp. 1450116 ◽  
Author(s):  
HASAN SOZEN ◽  
UGUR CAM
Keyword(s):  
Input Frequency ◽  
Spice Simulation ◽  
Pass Filter ◽  
First Order ◽  
Spice Model ◽  
Low Pass ◽  
Initial Resistance ◽  
Simulation Results ◽  
High Pass ◽  
Resistance Value

The memristor has drawn the worldwide attention since it has been discovered at HP laboratory on 1 May 2008. Since then many researchers are taking efforts to find its applications in various areas. In this paper, we study the filter characteristics of first-order low pass and high pass filters employing memristor with a capacitor. The paper provides a comparative analysis between low pass and high pass filter circuits that utilizing ordinary resistor or memristor with a capacitor. The theoretical analyzes are verified with SPICE simulation results using a memristor SPICE model with nonlinear dopant drift and MATLAB environment. The effect of change of the input frequency and initial resistance value of memristor on the cut-off frequencies of the presented low pass and high pass filters are investigated. The memory effect of memristor is represented by simulation results.

Programmable Universal Filters Using Current Conveyor Transconductance Amplifiers

2017 ◽  
Vol 26 (07) ◽  
pp. 1750121 ◽  
Author(s):  
Thanat Nonthaputha ◽  
Montree Kumngern
Keyword(s):  
Transfer Functions ◽  
Current Mode ◽  
Current Conveyor ◽  
Pass Band ◽  
Cmos Process ◽  
Low Pass ◽  
Band Pass ◽  
Transconductance Amplifiers ◽  
Biquadratic Filters ◽  
High Pass

This paper presents new programmable universal biquadratic filters using current conveyor transconductance amplifiers (CCTAs) by which both voltage- and current-mode filters can be obtained. The proposed filters use second-generation current conveyor (CCII) which is the first stage of CCTA to operate as current conveyor analog switch (CCAS) and this CCAS will be used to program the filtering functions such as low-pass, high-pass, band-pass, band-stop and all-pass filters. Unlike previous universal filters, the filtering functions of the proposed filters can be programmed using the bias currents of CCTAs without changing any input and output connections. The natural frequency and quality factor of all filtering functions can be controlled electronically and orthogonally using the bias currents of transconductance amplifiers. Also gain response of all transfer functions can be adjusted. The active and passive sensitivities of the filters are low. The proposed programmable filters have been simulated using 0.18[Formula: see text][Formula: see text]m CMOS process from TSMC. PSPICE simulation results are included to confirm workability of the proposed circuits.

scholarly journals 0.5 V Fifth-Order Butterworth Low-Pass Filter Using Multiple-Input OTA for ECG Applications

Sensors ◽  
2020 ◽  
Vol 20 (24) ◽  
pp. 7343
Author(s):  
Montree Kumngern ◽  
Nattharinee Aupithak ◽  
Fabian Khateb ◽  
Tomasz Kulej
Keyword(s):  
Power Consumption ◽  
Dynamic Range ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Subthreshold Region ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Multiple Input ◽  
Low Pass ◽  
Fifth Order

This paper presents a 0.5 V fifth-order Butterworth low-pass filter based on multiple-input operational transconductance amplifiers (OTA). The filter is designed for electrocardiogram (ECG) acquisition systems and operates in the subthreshold region with nano-watt power consumption. The used multiple-input technique simplifies the overall structure of the OTA and reduces the number of active elements needed to realize the filter. The filter was designed and simulated in the Cadence environment using a 0.18 µm Complementary Metal Oxide Semiconductor (CMOS) process from Taiwan Semiconductor Manufacturing Company (TSMC). Simulation results show that the filter has a bandwidth of 250 Hz, a power consumption of 34.65 nW, a dynamic range of 63.24 dB, attaining a figure-of-merit of 0.0191 pJ. The corner (process, voltage, temperature: PVT) and Monte Carlo (MC) analyses are included to prove the robustness of the filter.

100 MS/s, 10-BIT ADC USING PIPELINED SUCCESSIVE APPROXIMATION

2014 ◽  
Vol 23 (05) ◽  
pp. 1450057
Author(s):  
SAHAR SARAFI ◽  
KHEYROLLAH HADIDI ◽  
EBRAHIM ABBASPOUR ◽  
ABU KHARI BIN AAIN ◽  
JAVAD ABBASZADEH
Keyword(s):  
Successive Approximation ◽  
Sar Adc ◽  
Cmos Process ◽  
Pipelined Adc ◽  
Analog To Digital Converter ◽  
Digital Converter ◽  
Process Technology ◽  
Total Conversion ◽  
Analog To Digital ◽  
Simulation Results

This paper presents an analog-to-digital converter (ADC), using pipelined successive approximation register (SAR) architecture. The structure which is a combination of SAR-ADC and pipelined ADC benefits from each of their advantages. A new synchronization method is proposed to improve the pipelined SAR-ADC's speed. The proposed method reduces the total conversion without limiting the ADC performance. To evaluate the proposed method a 10-bit 100 MS/s is designed in 0.5 μm CMOS process technology. According to the obtained simulation results, the designed ADC digitizes a 9-MHz input with 54.19 dB SNDR while consuming 57.3 mw from a 5-V supply.

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