scholarly journals Poole–Frenkel Emission Saturation and Its Effects on Time-to-Failure in Ta-Ta2O5-MnO2 Capacitors

2019 ◽  
Vol 2019 ◽  
pp. 1-9
Author(s):  
Q. F. Pan ◽  
Q. Liu
Keyword(s):  
Leakage Current ◽  
Dielectric Breakdown ◽  
Time To Failure ◽  
Nondestructive Measurement ◽  
Time Dependent Dielectric Breakdown ◽  
Different Temperatures ◽  
Frenkel Emission ◽  
Lower Saturation

I-V characterization of Ta-Ta2O5-MnO2 capacitors was investigated at different temperatures, and Poole–Frenkel (PF) emission saturation was experimentally observed. Under the saturation voltage, the I-V curves at different temperature converged, and the temperature dependency was vanished. Above the saturation voltage, the leakage current was decreasing as the temperature increased. In order to evaluate the effects of saturation voltages (VS) on time-to-failure (TTF) of the capacitors, VS were first determined at +2°C and +25°C, then voltage accelerating tests were conducted at 85°C under 1.6 times of rated voltage. The distribution of VS and TTF of the samples were plotted and compared. It was shown that samples with lower saturation voltage failed earlier in the distribution of time-dependent dielectric breakdown. Comparing conventional methods for evaluating the quality of tantalum capacitors by measuring the leakage current at elevated temperature, the nondestructive measurement of saturation voltage at +2°C and +25°C may provide a novel and practicing approach tool to screening out capacitors with defected Ta2O5 layers.

Noise Analysis of the Leakage Current in Time-Dependent Dielectric Breakdown in a GaN SLCFET

2021 ◽  
Vol 68 (5) ◽  
pp. 2220-2225
Author(s):  
Stefano Dalcanale ◽  
Michael J. Uren ◽  
Josephine Chang ◽  
Ken Nagamatsu ◽  
Justin A. Parke ◽  
...  
Keyword(s):  
Leakage Current ◽  
Dielectric Breakdown ◽  
Noise Analysis ◽  
Time Dependent ◽  
Time Dependent Dielectric Breakdown

950 Volt 4H-SiC MOSFETs: DC and Transient Performance and Gate Oxide Reliability

2008 ◽  
Vol 600-603 ◽  
pp. 1131-1134 ◽  
Author(s):  
Kevin Matocha ◽  
Zachary Stum ◽  
Steve Arthur ◽  
Greg Dunne ◽  
Ljubisa Stevanovic
Keyword(s):  
Electric Field ◽  
Applied Electric Field ◽  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Time Dependent ◽  
Time To Failure ◽  
Time Dependent Dielectric Breakdown ◽  
Oxide Reliability ◽  
Blocking Voltage ◽  
Mean Time

SiC vertical MOSFETs were fabricated and characterized to achieve a blocking voltage of 950 Volts and a specific on-resistance of 8.4 mW-cm2. Extrapolations of time-dependent dielectric breakdown measurements versus applied electric field indicate that the gate oxide mean-time to failure is approximately 105 hours at 250°C.

Evaluation of 4H-SiC Carbon Face Gate Oxide Reliability

2011 ◽  
Vol 679-680 ◽  
pp. 354-357
Author(s):  
Jody Fronheiser ◽  
Aveek Chatterjee ◽  
Ulrike Grossner ◽  
Kevin Matocha ◽  
Vinayak Tilak ◽  
...  
Keyword(s):  
Dielectric Breakdown ◽  
Inversion Layer ◽  
Gate Oxide ◽  
Dielectric Strength ◽  
Time To Failure ◽  
Research Groups ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Time Dependent Dielectric Breakdown ◽  
Oxide Reliability

The gate oxide reliability and channel mobility of carbon face (000-1) 4H Silicon Carbide (SiC) MOSFETs are investigated. Several gate oxidation processes including dry oxygen, pyrogenic steam, and nitrided oxides were investigated utilizing MOS capacitors for time dependent dielectric breakdown (TDDB), dielectric field strength, and MOSFETs for inversion layer mobility measurements. The results show the C-face can achieve reliability similar to the Si-face, however this is highly dependent on the gate oxide process. The reliability is inversely related to the field effect mobility where other research groups report that pyrogenic steam yields the highest electron mobility while this work shows it has weakest oxide in terms of dielectric strength and shortest time to failure.

Characterization of 4H-SiC PiN Diodes Formed on Defects Identified by PL Imaging

2016 ◽  
Vol 858 ◽  
pp. 405-409 ◽  
Author(s):  
Yeganeh Bonyadi ◽  
Peter M. Gammon ◽  
Roozbeh Bonyadi ◽  
Vishal Ajit Shah ◽  
C.A. Fisher ◽  
...  
Keyword(s):  
Leakage Current ◽  
Electrical Characteristics ◽  
Pin Diodes ◽  
Turn On ◽  
State Behaviour ◽  
P Type ◽  
Soft Breakdown ◽  
Current Behaviour

In this paper the results of a study in which the surface quality of 30, 35 and 110 µm 4H-SiC epitaxial layers from different manufacturers are evaluated using AFM and photoluminescence (PL) imaging. PiN diodes are then intentionally fabricated on triangular defects and polytypes grains which are formed, in order to understand their impact on the resulting electrical characteristics, which includes on-state behaviour, turn-on characteristics and reverse leakage current behaviour. The results indicate that the defects form a high resistance short through the p-type anode. This results in higher leakage current, well over 108 times higher than the devices formed off-defect. PiN diodes fabricated on-defect also suffered from soft breakdown unlike those off-defect.

Microscopy of VLSI oxides

1991 ◽  
Vol 49 ◽  
pp. 796-797
Author(s):  
Hiroshi Iwasaki
Keyword(s):  
Electric Fields ◽  
Dielectric Breakdown ◽  
Lattice Image ◽  
Insulating Films ◽  
Time Dependent Dielectric Breakdown ◽  
Thin Gate Oxide ◽  
P Type ◽  
20 Nm ◽  
Mobility Study

The oxide of silicon and other insulating films form an integral part of every VLSI circuit (e.g. Fig. 1). Thin gate oxide(SiO2) in the thickness range of 10-20 nm (5-10 nm) is needed for submicron (quatermicron) devices. For such devices, characterization of surface roughness at Si/SiO2 interfaces becomes increasingly important because it is expected to affect field-dependent dielectric breakdown (FDDB), time-dependent dielectric breakdown (TDDB) and carrier mobility of MOS FETs more sensitively at necessitated higher operating electric fields. The Si/SiO2 interface is usually considered as the boundary between Si lattice image and granular SiO2 image.P-type, CZ- Si(001) substrates with resistivity of 10-13 Ωcm were first cleaned by the RCA method and were oxidized in aquartz tube to 16nm thickness: OC2=100% at 900°C for 53 min (dry oxide), O2/H2=1/4 for 11 min (wet oxide). Some MOS structured samples were also studied. Some dry oxide and reoxidized nitrided oxide (ONO) of 7nm thickness were formed by rapid thermal process for electron mobility study.

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