Characterization of 4H-SiC PiN Diodes Formed on Defects Identified by PL Imaging

2016 ◽  
Vol 858 ◽  
pp. 405-409 ◽  
Author(s):  
Yeganeh Bonyadi ◽  
Peter M. Gammon ◽  
Roozbeh Bonyadi ◽  
Vishal Ajit Shah ◽  
C.A. Fisher ◽  
...  
Keyword(s):  
Leakage Current ◽  
Electrical Characteristics ◽  
Pin Diodes ◽  
Turn On ◽  
State Behaviour ◽  
P Type ◽  
Soft Breakdown ◽  
Current Behaviour

In this paper the results of a study in which the surface quality of 30, 35 and 110 µm 4H-SiC epitaxial layers from different manufacturers are evaluated using AFM and photoluminescence (PL) imaging. PiN diodes are then intentionally fabricated on triangular defects and polytypes grains which are formed, in order to understand their impact on the resulting electrical characteristics, which includes on-state behaviour, turn-on characteristics and reverse leakage current behaviour. The results indicate that the defects form a high resistance short through the p-type anode. This results in higher leakage current, well over 108 times higher than the devices formed off-defect. PiN diodes fabricated on-defect also suffered from soft breakdown unlike those off-defect.

Nanoprobing Application on Characterization of 6T-SRAM Single Bit Failures with Different Gox Breakdown Defect

2006 ◽  
Author(s):  
Cheng-Piao Lin ◽  
Chin-Hsin Tang ◽  
Cheng-Hsu Wu ◽  
Cheng-Chun Ting
Keyword(s):  
Copper Metallization ◽  
Physical Analysis ◽  
Electrical Characteristics ◽  
Gate Leakage Current ◽  
Data Retention ◽  
Simulation Data ◽  
Failure Data ◽  
Dual Gate ◽  
Soft Breakdown

Abstract This paper analyzes several SRAM failures using nano-probing technique. Three SRAM single bit failures with different kinds of Gox breakdown defects analyzed are gross function single bit failure, data retention single bit failure, and special data retention single bit failure. The electrical characteristics of discrete 6T-SRAM cells with soft breakdown are discussed and correlated to evidences obtained from physical analysis. The paper also verifies many previously published simulation data. It utilizes a 6T-SRAM vehicle consisting of a large number of SRAM cells fabricated by deep sub-micron, dual gate, and copper metallization processes. The data obtained from this paper indicates that Gox breakdown location within NMOS pull-down device has larger a impact on SRAM stability than magnitude of gate leakage current, which agrees with previously published simulation data.

scholarly journals 10 kV Silicon Carbide PiN Diodes—From Design to Packaged Component Characterization

Energies ◽  
2019 ◽  
Vol 12 (23) ◽  
pp. 4566 ◽  
Author(s):  
Asllani ◽  
Morel ◽  
Phung ◽  
Planson
Keyword(s):  
Silicon Carbide ◽  
Leakage Current ◽  
Voltage Drop ◽  
Forward Bias ◽  
Forward Voltage ◽  
Pin Diodes ◽  
Pulse Switching ◽  
Turn On ◽  
Forward Voltage Drop ◽  
Fabrication And Characterization

This paper presents the design, fabrication and characterization results obtained on the last generation (third run) of SiC 10 kV PiN diodes from SuperGrid Institute. In forward bias, the 59 mm2 diodes were tested up to 100 A. These devices withstand voltages up to 12 kV on wafer (before dicing, packaging) and show a low forward voltage drop at 80 A. The influence of the temperature from 25 °C to 125 °C has been assessed and shows that resistivity modulation occurs in the whole temperature range. Leakage current at 3 kV increases with temperature, while being three orders of magnitude lower than those of equivalent Si diodes. Double-pulse switching tests reveal the 10 kV SiC PiN diode’s outstanding performance. Turn-on dV/dt and di/dt are −32 V/ns and 311 A/µs, respectively, whereas turn-off dV/dt and di/dt are 474 V/ns and −4.2 A/ns.

Electrical Characteristics of Fluorine Passivated MOCVD-TiO2 Film on (NH4)2Sx Treated GaAs

2008 ◽  
Vol 368-372 ◽  
pp. 232-234
Author(s):  
Ming Kwei Lee ◽  
Chih Feng Yen ◽  
Tsung Hsiang Shih ◽  
Chen Lia Ho ◽  
Hung Chang Lee ◽  
...  
Keyword(s):  
Leakage Current ◽  
Electric Fields ◽  
Energy Gap ◽  
Compound Semiconductor ◽  
Tio2 Films ◽  
Electrical Characteristics ◽  
Liquid Phase Deposition ◽  
Native Oxides ◽  
P Type ◽  
Surface Fermi Level

The high Dit is the major problem of III-V compound semiconductor MOSFET, which causes the pinning of the surface Fermi level near the middle of the energy gap. The GaAs with (NH4)2Sx treatment (S-GaAs) can remove the native oxides on GaAs and prevent it from oxidizing. The electrical characteristics of fluorinated polycrystalline TiO2 films deposited on p-type(100) S-GaAs were investigated. The fluorine from liquid phase deposition solution can passivate the grain boundary of polycrystalline TiO2 prepared by MOCVD. The leakage current through the grain boundaries was suppressed. The leakage current of MOCVD-TiO2/S-GaAs can be improved from 6.8 x 10-6 and 0.2 A/cm2 to 3.41 x 10-7 and 1.13 x 10-6A/cm2 under positive and negative electric fields at 1.5 MV/cm, respectively. Dit and k can be improved from 1.44 x 1012 cm-2eV-1 to 4.6 x 1011 cm-2eV-1 and 52 to 65, respectively. The effective oxide charges can be improved from 2.5 x 1012 C/cm-2 to 9.3 x 1011 C/cm-2.

Characterization of GaN p-n Junction Grown on Si (111) Substrate by Plasma-Assisted Molecular Beam Epitaxy

2011 ◽  
Vol 364 ◽  
pp. 139-143
Author(s):  
Radzali Rosfariza ◽  
Anas Ahmad Mohd ◽  
Hassan Zainuriah ◽  
Norzaini Zainal ◽  
Fong Kwong Yam ◽  
...  
Keyword(s):  
Molecular Beam Epitaxy ◽  
Molecular Beam ◽  
Band Edge Emission ◽  
X Ray Diffraction ◽  
Sem Image ◽  
Raman Measurement ◽  
P Type ◽  
Sharp Interfaces

In this report, the growth of GaN p-n junction on Si (111) substrate by plasma-assisted molecular beam epitaxy (PAMBE) is demonstrated. Doping of the GaN p-n junction has been carried out using Si and Mg as n-type and p-type dopants, respectively. Silicon substrate is used to grow the GaNpn-junction. In order to improve the crystalline quality of the nitride based junction, AlN is used as a buffer layer. The optical properties of the sample have been characterized by photoluminescence (PL) and Raman spectroscopy.PL spectrum shows a strong band edge emission of GaN at ~364nm, indicating good quality of the sample.The presence of peak ~657cm-1in Raman measurement has exhibited asuccessful doping of Mg in the sample. The structural properties are measured by high-resolution x-ray diffraction (HR-XRD) and scanning electron microscopy (SEM). The cross section of the SEM image of the sample has shown sharp interfaces.

scholarly journals Poole–Frenkel Emission Saturation and Its Effects on Time-to-Failure in Ta-Ta2O5-MnO2 Capacitors

2019 ◽  
Vol 2019 ◽  
pp. 1-9
Author(s):  
Q. F. Pan ◽  
Q. Liu
Keyword(s):  
Leakage Current ◽  
Dielectric Breakdown ◽  
Time To Failure ◽  
Nondestructive Measurement ◽  
Time Dependent Dielectric Breakdown ◽  
Different Temperatures ◽  
Frenkel Emission ◽  
Lower Saturation

I-V characterization of Ta-Ta2O5-MnO2 capacitors was investigated at different temperatures, and Poole–Frenkel (PF) emission saturation was experimentally observed. Under the saturation voltage, the I-V curves at different temperature converged, and the temperature dependency was vanished. Above the saturation voltage, the leakage current was decreasing as the temperature increased. In order to evaluate the effects of saturation voltages (VS) on time-to-failure (TTF) of the capacitors, VS were first determined at +2°C and +25°C, then voltage accelerating tests were conducted at 85°C under 1.6 times of rated voltage. The distribution of VS and TTF of the samples were plotted and compared. It was shown that samples with lower saturation voltage failed earlier in the distribution of time-dependent dielectric breakdown. Comparing conventional methods for evaluating the quality of tantalum capacitors by measuring the leakage current at elevated temperature, the nondestructive measurement of saturation voltage at +2°C and +25°C may provide a novel and practicing approach tool to screening out capacitors with defected Ta2O5 layers.

Advances in 4H-SiC Homoepitaxy for Production and Development of Power Devices

2006 ◽  
Vol 911 ◽  
Author(s):  
Bernd Thomas ◽  
Christian Hecht ◽  
René Stein ◽  
Peter Friedrichs
Keyword(s):  
Growth Parameters ◽  
Power Devices ◽  
Pin Diodes ◽  
Continuous Growth ◽  
As Doping ◽  
Homoepitaxial Growth ◽  
Layer Deposition ◽  
Research Grade ◽  
P Type

AbstractIn this paper we present results of epitaxial layer deposition for production needs using our hot-wall CVD multi-wafer system. This equipment exhibits a capacity of 7x3” wafers per run and can be upgraded to a 6x4” setup. Characteristics of epilayers and reproducibility of the proc-esses are reported. Furthermore, we show recent results of p-type SiC homoepitaxial growth on 3” 4° off-oriented substrates using a single-wafer hot-wall CVD. The dependence of layer prop-erties on growth parameters, doping and thickness uniformity as well as doping memory effects are discussed. For the characterization of epitaxially grown pn-junctions first research grade pin-diodes were fabricated. The p-type emitters were either deposited in the same growth run to-gether with the n-type buffer and drift layers (continuous growth) or the n- and p-layers were grown in two different growth runs (separate growth).

Effects of the Surface Condition of the Substrates on the Electrical Characteristics of 4H-SiC MOSFETs

2009 ◽  
Vol 615-617 ◽  
pp. 781-784 ◽  
Author(s):  
Takeshi Ohshima ◽  
Shinobu Onoda ◽  
Toshiro Kamada ◽  
Kazutoshi Hotta ◽  
Kenji Kawata ◽  
...  
Keyword(s):  
Surface Roughness ◽  
Field Effect Transistors ◽  
Surface Condition ◽  
Drain Current ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Electrical Characteristics ◽  
Surface Conditions ◽  
P Type

Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) were fabricated on p-type epitaxial 4H-SiC substrates with different surface conditions and these electrical characteristics were compared. The MOSFETs on Chemical Mechanical Polished substrates showed the drain current of the order of 10-12A at a gate voltage of 0 V, and the value of the drain current increased with increasing the surface roughness of substrates. With decreasing the surface roughness of substrates, the values of the threshold voltage decreased and the quality of gate oxide became better.

Fabrication of Silicon Carbide PIN Diodes by Laser Doping and Planar Edge Termination by Laser Metallization

2005 ◽  
Vol 864 ◽  
Author(s):  
Z. Tian ◽  
N.R. Quick ◽  
A. Kar
Keyword(s):  
Silicon Carbide ◽  
Leakage Current ◽  
Rutherford Backscattering ◽  
High Resistivity ◽  
Direct Write ◽  
Pin Diodes ◽  
Laser Doping ◽  
Edge Termination ◽  
P Type ◽  
Conventional Annealing

AbstractSilicon carbide PIN diodes have been fabricated using a direct write laser doping and metallization technique. Trimethyaluminum (TMA) and nitrogen are precursors used to laser dope p-type and n-type regions, respectively, and μ4.3 mm p-type doped junction and 4 mm ntype doped junction are fabricated in semi-insulating 6H-SiC wafers. Rutherford backscattering studies show that no amorphization occurred during the laser doping process. A planar edge termination is fabricated by laser metallization in argon ambient to form a high resistivity layer. With this termination, the leakage current of the PIN diodes can be suppressed effectively compared to that of diodes without edge termination. The performance of the diodes can also be tailored by shrinking the active area of the diode and by conventional annealing.

Sign in / Sign up

Export Citation Format

Share Document