Microscopy of VLSI oxides

Author(s):  
Hiroshi Iwasaki

The oxide of silicon and other insulating films form an integral part of every VLSI circuit (e.g. Fig. 1). Thin gate oxide(SiO2) in the thickness range of 10-20 nm (5-10 nm) is needed for submicron (quatermicron) devices. For such devices, characterization of surface roughness at Si/SiO2 interfaces becomes increasingly important because it is expected to affect field-dependent dielectric breakdown (FDDB), time-dependent dielectric breakdown (TDDB) and carrier mobility of MOS FETs more sensitively at necessitated higher operating electric fields. The Si/SiO2 interface is usually considered as the boundary between Si lattice image and granular SiO2 image.P-type, CZ- Si(001) substrates with resistivity of 10-13 Ωcm were first cleaned by the RCA method and were oxidized in aquartz tube to 16nm thickness: OC2=100% at 900°C for 53 min (dry oxide), O2/H2=1/4 for 11 min (wet oxide). Some MOS structured samples were also studied. Some dry oxide and reoxidized nitrided oxide (ONO) of 7nm thickness were formed by rapid thermal process for electron mobility study.

1992 ◽  
Vol 262 ◽  
Author(s):  
G. -S. Lee ◽  
J. -G. Park ◽  
S. -P. Choi ◽  
C. -H. Shin ◽  
Y. -B. Sun ◽  
...  

ABSTRACTIn this study, using oxide breakdown voltage and time-dependent-dielectric breakdown measurements, thermal wave modulated reflectance and chemical etching/optical microscopy, we investigated effects of Si ion implantation upon formation of D-defects and thin gate oxide integrity. Our data show that addition of Si ion implantation with a dose of up to 1013 ions/cm2 improves oxide integrity if the implantation is done at a certain step just before sacrificial oxidation in the Mb DRAM process. However, no improvement in oxide integrity is observed when the same implantation is done on the virgin wafer surfaces at the start of the same Mb DRAM process. We discuss our hypothesis that the improvement in oxide integrity is due to a reduction in the D-defect density in the near-surface region of the wafer.


2001 ◽  
Vol 693 ◽  
Author(s):  
Th. Gessmann ◽  
Y.-L. Li ◽  
J. W. Graff ◽  
E. F. Schubert ◽  
J. K. Sheu

AbstractA novel type of low-resistance ohmic contacts is demonstrated utilizing polarization-induced electric fields in thin p-type InGaN layers on p-type GaN. An increase of the hole tunneling probability through the barrier and a concomitant significant decrease of the specific contact resistance can be attributed to a reduction of the tunneling barrier width in the InGaN capping layers due to the polarization-induced electric fields. The specific contact resistance of Ni (10 nm) / Au (30 nm) contacts deposited on the InGaN capping layers was determined by the transmission line method. Specific contact resistances of 1.2 × 10-2 Ω cm2 and 6 × 10-3 & cm2 were obtained for capping layer thicknesses of 20 nm and 2 nm, respectively.


1995 ◽  
Vol 386 ◽  
Author(s):  
J. S. Suehle ◽  
P. Chaparala

ABSTRACTTime-Dependent Dielectric Breakdown studies were performed on 6.5-, 9-, 15-, 20-, and 22.5- nm thick SiO2 films over a wide range of stress temperatures and electric fields. Very high temperatures (400 °C) were used to accelerate breakdown so that stress tests could be performed at low electric fields close to those used for device operating conditions. The results indicate that the dependence of TDDB on electric field and temperature is different from that reported in earlier studies. Specifically, the electric-field-acceleration parameter is independent of temperature and the thermal activation energy was determined to be between 0.7 and 0.9 eV for stress fields below 7.0 MV/cm.Failure distributions of high-quality current-generation oxide films are shown to be of single mode and have dispersions that are not sensitive to stress electric field or temperature, unlike distributions observed for oxides examined in earlier studies. These results have implications on the choice of the correct physical model to describe TDDB in thin films. The data also demonstrate for the first time the reliability of silicon dioxide films at very high temperatures.


1995 ◽  
Vol 391 ◽  
Author(s):  
J. S. Suehle ◽  
P. Chaparala

AbstractTime-Dependent Dielectric Breakdown studies were performed on 6.5-, 9-, 15-, 20-, and 22.5-nm thick SiO2 films over a wide range of stress temperatures and electric fields. Very high temperatures (400 °C) were used to accelerate breakdown so that stress tests could be performed at low electric fields close to those used for device operating conditions. The results indicate that the dependence of TDDB on electric field and temperature is different from that reported in earlier studies. Specifically, the electric-field-acceleration parameter is independent of temperature and the thermal activation energy was determined to be between 0.7 and 0.9 eV for stress fields below 7.0 MV/cm.Failure distributions of high-quality current-generation oxide films are shown to be of single mode and have dispersions that are not sensitive to stress electric field or temperature, unlike distributions observed for oxides examined in earlier studies. These results have implications on the choice of the correct physical model to describe TDDB in thin films. The data also demonstrate for the first time the reliability of silicon dioxide films at very high temperatures.


2019 ◽  
Vol 2019 ◽  
pp. 1-9
Author(s):  
Q. F. Pan ◽  
Q. Liu

I-V characterization of Ta-Ta2O5-MnO2 capacitors was investigated at different temperatures, and Poole–Frenkel (PF) emission saturation was experimentally observed. Under the saturation voltage, the I-V curves at different temperature converged, and the temperature dependency was vanished. Above the saturation voltage, the leakage current was decreasing as the temperature increased. In order to evaluate the effects of saturation voltages (VS) on time-to-failure (TTF) of the capacitors, VS were first determined at +2°C and +25°C, then voltage accelerating tests were conducted at 85°C under 1.6 times of rated voltage. The distribution of VS and TTF of the samples were plotted and compared. It was shown that samples with lower saturation voltage failed earlier in the distribution of time-dependent dielectric breakdown. Comparing conventional methods for evaluating the quality of tantalum capacitors by measuring the leakage current at elevated temperature, the nondestructive measurement of saturation voltage at +2°C and +25°C may provide a novel and practicing approach tool to screening out capacitors with defected Ta2O5 layers.


2007 ◽  
Vol 556-557 ◽  
pp. 675-678 ◽  
Author(s):  
Kevin Matocha ◽  
Richard Beaupre

Thermal oxides on 4H-SiC are characterized using time-dependent dielectric breakdown techniques at electric fields between 6 and 10 MV/cm. At 250°C, oxides thermally-grown using N2O with NO annealing achieve a mean time to failure (MTTF) of 2300 hours at 6 MV/cm. Oxides grown in steam with NO annealing show approximately four times longer MTTF than N2O-grown oxides. At electric fields greater than 8 MV/cm, Fowler-Nordheim tunneling significantly reduces the expected failure times. For this reason, extrapolation of mean-time to failure at low fields must be performed by datapoints measured at lower electric fields.


2007 ◽  
Vol 46 (4A) ◽  
pp. 1444-1451 ◽  
Author(s):  
Kazuyoshi Ueno ◽  
Akiko Kameyama ◽  
Akira Matsumoto ◽  
Manabu Iguchi ◽  
Toshiyuki Takewaki ◽  
...  

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