Analysis of Binary DC Source Reduced Switch 7-level Inverter

Author(s):  
V. Arun ◽  
B. Shanthi ◽  
M. Arumugam

This paper proposes a binary DC source reduced switch 7-level inverter. Binary DC source reduced switch inverter is triggered by the Unipolar PWM strategy having sinusoidal and trapezoidal reference with triangular carriers. These Pulse Width Modulating (PWM) strategies include Phase Disposition (PD), Alternate Phase Opposition Disposition (APOD), Carrier Overlapping (CO). Performance factors like Total Harmonic Distortion (THD), VRMS (fundamental) and crest factor are evaluated for various modulation indices. Simulations were performed using MATLAB-SIMULINK. It is observed that UPDPWM strategy with trapezoidal reference provides output with relatively low distortion and UCOPWM strategy with trapezoidal reference provides relatively higher fundamental RMS output voltage.

Author(s):  
M. H. Yatim ◽  
A. Ponniran ◽  
M. A. Zaini ◽  
M. S. Shaili ◽  
N. A. S. Ngamidun ◽  
...  

The purpose of this study is to analyze the operation and design of symmetrical and asymmetrical multilevel inverter structures with reduced number of switching devices. In this study, the term of conventional inverter is defined as a single cascaded inverter. Specifically, the inverter operates in three complete loops and only produces 2-level and 3-level of output voltages. Usually, cascaded structure suffers from the high total harmonic distortion. Thus, by considering multilevel structure of inverter, low total harmonic distortion reduction and voltage stress reduction on switching devices can be archived. Sinusoidal pulse width modulation and modified square pulse width modulation are used as modulation techniques in switching schemes of the designed multilevel inverters. The findings indicate that, the designed multilevel structure cause low total harmonics distortion at the output voltage. Furthermore, the asymmetrical structure is producing the same output voltage levels with reduced number of switching devices compared to the symmetrical structure is experimentally confirmed. The findings show that the total harmonic distortion for 7-level (symmetrical) and 9-level (asymmetrical) are 16.45% and 15.22%, respectively.


Author(s):  
Jayesh B. Patil

This article builds a symmetric hybridized cascaded a switching capacitor unit in a multilayer inverter and compares it to For 17 level inverters, A switched capacitor unit is utilized with an asymmetric multilevel inverter. In the symmetric hybridized multilevel inverter design, a In the midst of a dual-input dc source, there is a bi-directional switch is utilized to create a modified H-bridge inverter with a five-level output voltage instead of three. In the proposed scenario, In an asymmetric multilevel inverter, the switched capacitor unit substitutes the dc sources. which enlarges By a factor of two, The output voltage has been increased. and the voltage levels at the loads are increased by a factor of two. MATLAB-SIMULINK was used to verify the suggested topology using the staircase modulation approach. The findings show that multilayer inverter topologies with low total harmonic distortion, fewer switches, With greater levels of output voltage are better stable during load disturbance circumstances, making them ideal for renewable energy applications.


2018 ◽  
Vol 7 (4.30) ◽  
pp. 234
Author(s):  
M. H. Yatim ◽  
A. Ponniran ◽  
A. A. Bakar ◽  
A. N. Kasiran ◽  
K. R. Noor ◽  
...  

This paper presents symmetric and asymmetric multilevel inverter principles using reduced number of switching devices circuit structure. Principally, asymmetric multilevel inverter topology able to produce higher output voltage level without modification of the structure in order to reduce total harmonic distortion at the output voltage. In contrast, the number of switching devices need to be increased with symmetric principle when higher output voltage level is considered. In this study, 5-level reduced number of switching devices circuit structure is selected as a circuit configuration for symmetric (5-level structure) and asymmetric (7-level and 9-level structures) multilevel inverters. For switching strategy, modified pulse width modulation and sinusoidal pulse width modulation are selected to produce output voltage levels of the inverter. Modified pulse width modulation used low switching frequency in producing signal and needs higher output voltage levels to achieve low total harmonic distortion. In contrast, sinusoidal pulse width modulation used high switching frequency in order to minimize total harmonic distortion. Theoretically, total harmonic distortion is reduced when number of output voltage level is increased for both cases. The findings show that, the 9-level asymmetric topology has lower total harmonic distortion compared to the 5-level symmetric topology and 7-level asymmetric topology, whereby these inverters using the same circuit configuration. The results show that, the total harmonic distortions of 9-level asymmetric topology, 7-level asymmetric topology and 5-level symmetric topology are 14.54%, 18.08% and 26.92%, respectively with sinusoidal pulse width modulation switching strategy. Meanwhile, with modified pulse width modulation switching strategy, the total harmonic distortions of 9-level asymmetric topology, 7-level asymmetric topology and 5-level symmetric topology are 18.7%, 21.68% and 28.99%, respectively. Therefore, 9-level asymmetric with sinusoidal pulse width modulation switching strategy show the lowest total harmonic distortion with optimum number of switching devices.


2018 ◽  
Vol 7 (2.24) ◽  
pp. 55
Author(s):  
Anuja Prashant Diwan ◽  
N Booma Nagarajan ◽  
T Murugan ◽  
S Ashrafudeen ◽  
G J. Jenito Paul

In this paper, single phase nine level cascaded multilevel inverter using trinary voltage source is described. Normally for getting nine level MLI output, four H-Bridges are required. But in proposed method, nine level output is achieved by using two H-Bridges only. Performance of Multilevel inverter is improved by using modular switching pattern. This method reduces the number of switches to the half and thus reduces switching losses. Since the number of levels at the output voltage is increased, Total Harmonic Distortion (THD) gets reduced significantly. This presents simple configuration is simple and can be controlled easily. MATLAB-SIMULINK is used to validate the results of proposed technic, simulation is carried out using. The proposed method has been exhaustively compared with classical cascaded H-Bridge topology. 


2019 ◽  
pp. 22-29

Caracterización del método SVPWM con inversor trifásico de dos niveles Juan Tisza1, 2, Javier Villegas2 1Universidad Nacional de Ingeniería, Av. Túpac Amaru 210, Rímac, Lima Perú 2Universidad Nacional Mayor de San Marcos, Ciudad Universitaria, Lima, Perú Recibido 17 de junio del 2019, Revisado el 17 de julio de 2019 Aceptado el 19 de julio de 2019 DOI: https://doi.org/10.33017/RevECIPeru2019.0005/ Resumen Las cargas en Corriente Alterna (CA) requieren voltaje variable y frecuencia variable. Estos requisitos se cumplen con un inversor de fuente de voltaje (VSI). Se puede lograr un voltaje de salida variable variando la tensión de CC de entrada y manteniendo constante la ganancia del inversor. Por otro lado, si la tensión de entrada CC es fija y no es controlable, se puede lograr una tensión de salida variable variando la ganancia del inversor, lo que normalmente se logra mediante el control de modulación por ancho de pulso dentro del inversor. Hay varias técnicas de modulación de ancho de pulso, pero la técnica de vector espacial es una buena opción entre todas las técnicas para controlar el inversor de fuente de voltaje. La modulación por ancho de pulso de vector espacial (SVPWM) es un método avanzado y muy popular con varias ventajas tales como la utilización efectiva del bus de CC, menos generación de armónicos en voltaje de salida, menos pérdidas de conmutación, amplio rango de modulación lineal, etc. En este documento, se ha tomado un inversor de fuente de voltaje constante CC y se ha implementado la SVPWM para VSI de dos niveles utilizando MATLAB / SIMULINK. Descriptores: Modulación de ancho de pulso (PWM), modulación de ancho de pulso de vector espacial (SVPWM), distorsión armónica total (THD), inversor de fuente de voltaje (VSI). Abstract Alternating Current (AC) loads require variable voltage and variable frequency. These requirements are met by a voltage supply inverter (VSI). A variable output voltage can be achieved by varying the input DC voltage and keeping the inverter gain constant. On the other hand, if the DC input voltage is fixed and not controllable, a variable output voltage can be achieved by varying the gain of the inverter, which is normally achieved by controlling the pulse width modulation within the inverter. There are several pulse width modulation techniques, but the spatial vector technique is a good choice among all the techniques for controlling the voltage source inverter. Spatial vector pulse width modulation (SVPWM) is an advanced and very popular method with several advantages such as effective utilization of CC bus, less harmonic generation in output voltage, less switching losses, wide range of linear modulation, etc. In this document, a CC constant voltage source inverter has been taken and SVPWM has been implemented for two-level VSI using MATLAB / SIMULINK. Keywords: Pulse Width Modulation (PWM), Space Vector Pulse Width Modulation (SVPWM), Total Harmonic Distortion (THD), Voltage Source Inverter (VSI).


Author(s):  
M. H. Yatim ◽  
A. Ponniran ◽  
A. N. Kasiran

<span>This paper presents a proposed modified pulse width modulation – low frequency triangular (MPWM-LFT) switching strategy for minimization of voltage THD with implementation of asymmetric multilevel inverter (AMLI) topology on the reduced number of switching devices (RNSD) circuit structure. Principally, MPWM-LFT able to produce optimum angle of the output voltage level in order to minimize total harmonic distortion (THD). In this study, 5-level reduced number of switching devices circuit structure is selected as a circuit configuration for asymmetric (7-level structure) multilevel inverter. For switching strategy, MPWM used low switching frequency in producing signal and needs higher output voltage levels to achieve low total harmonic distortion. In contrast, sinusoidal pulse width modulation used high switching frequency in order to minimize total harmonic distortion. By optimizing angle at the output voltage using MPWM-LFT switching strategy, the voltage THD is lower as compared to MPWM and SPWM switching strategies. MPWM-LFT switching strategy obtains 11.6% of voltage THD for the 7-level asymmetric topology as compared to MPWM and SPWM switching strategies with the voltage THD are 21.5% and 17.5% respectively from the experimental works.</span>


Author(s):  
C.R. Balamurugan ◽  
S.P. Natarajan ◽  
R. Bensraj

<p>This paper focuses on hybrid H-bridge cascaded MLI using two equal dc sources in order to produce a five-level output. The proposed topology reduces the number of dc sources and switching elements. This paper emphasis on various Inverted Sine Carrier PWM (ISCPWM) techniques with equal amplitude and unequal amplitude carriers. The Inverted Sine Carrier Pulse Width Modulation (ISCPWM) technique enhances the fundamental output voltage particularly at lower modulation index ranges with reduction in Total Harmonic Distortion (THD) and switching losses. Simulation is performed using MATLAB-SIMULINK. From the simulation it is observed that Variable Amplitude Inverted Sine Carrier Variable Frequency (VAISCVF) strategy provides output with relatively low distortion for all strategies. It is also seen that Variable Amplitude Inverted Sine Carrier Phase Disposition (VAISCPD) is found to perform better for all strategies since it provides relatively higher fundamental RMS output voltage.</p>


2018 ◽  
Vol 17 (3) ◽  
pp. 89-102
Author(s):  
Md. Saiful Islam ◽  
Md. Rifat-Ul-Karim Shovon ◽  
Abdul Goffar Khan

This paper presents a comparative study of the application of Thyristor versus IGBT in AC-DC controlled power converter. Both simulation and practical experiment have been carried out to test the relationship between the average output voltage (Vdc) with firing angle (α, for Thyristor) and triggering pulse width (, for IGBT). Also the total harmonic distortion (THD) has been observed in both the cases. It is observed that IGBT based power converter introduces more harmonics in the system, in spite of more symmetrical output voltage wave shape.


2018 ◽  
Vol 7 (3) ◽  
pp. 1059
Author(s):  
Mustafa Fawzi Mohammed ◽  
Ali Husain Ahmad ◽  
AbdulRahim Thiab Humod

The most concerns in the inverter's design are about, how to make the output voltage of the inverter sinusoidal at the desired fundamental frequency with low total harmonic distortion (THD). This paper presents a design and implementation of single-phase five-level inverter which is powered by single dc source and based on T-type multi-level inverters construction. The proposed inverter is built mainly by six IGBTs and two diodes. The used modulation technique is based on using two triangular carriers at 2000 Hz frequency and shifted by phase opposition disposition (POD) method. The carriers are made slightly unbalanced with their amplitudes. The over-modulation method is also introduced in the design to get the lowest possible THD effect without using filters. The inverter is simulated by MATLAB SIMULINK, implemented practically, and tested with the help of LabVIEW software.  


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