scholarly journals Modified Cascaded H-Bridge Multilevel Inverter using Trinary DC source

2018 ◽  
Vol 7 (2.24) ◽  
pp. 55
Author(s):  
Anuja Prashant Diwan ◽  
N Booma Nagarajan ◽  
T Murugan ◽  
S Ashrafudeen ◽  
G J. Jenito Paul
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Voltage Source ◽  
Matlab Simulink ◽  
Switching Losses ◽  
Switching Pattern ◽  
Cascaded Multilevel Inverter

In this paper, single phase nine level cascaded multilevel inverter using trinary voltage source is described. Normally for getting nine level MLI output, four H-Bridges are required. But in proposed method, nine level output is achieved by using two H-Bridges only. Performance of Multilevel inverter is improved by using modular switching pattern. This method reduces the number of switches to the half and thus reduces switching losses. Since the number of levels at the output voltage is increased, Total Harmonic Distortion (THD) gets reduced significantly. This presents simple configuration is simple and can be controlled easily. MATLAB-SIMULINK is used to validate the results of proposed technic, simulation is carried out using. The proposed method has been exhaustively compared with classical cascaded H-Bridge topology. 

A 21-Level Bipolar Single-Phase Modular Multilevel Inverter

2019 ◽  
Vol 29 (01) ◽  
pp. 2050004
Author(s):  
Sidharth Sabyasachi ◽  
Vijay B. Borghate ◽  
Santosh Kumar Maddugari
Keyword(s):  
Electric Vehicle ◽  
High Voltage ◽  
Output Voltage ◽  
Single Phase ◽  
Emergency Services ◽  
Multilevel Inverter ◽  
Experimental Confirmation ◽  
Voltage Source ◽  
Matlab Simulink ◽  
Inverter Topology

This paper presents a module for single-phase multilevel inverter topology. The proposed module generates maximum 21-level bipolar output voltage with asymmetric sources without H-bridge. This results in reduction in filter cost and size. The module can be cascaded for high voltage applications. The same arrangement of voltage source magnitudes in first module is maintained in the remaining cascaded modules. The proposed topology is suitable for the applications like electric vehicle and emergency services like residences and hospitality industries, etc. A set of comparisons between the proposed and recently published topologies are provided to differentiate between them. The topology is simulated and verified in MATLAB/SIMULINK. A hardware prototype is developed in the laboratory for experimental confirmation with various conditions.

A New Structure of Quasi Z-Source-Based Cascaded Multilevel Inverter

2017 ◽  
Vol 26 (12) ◽  
pp. 1750203 ◽  
Author(s):  
Ebrahim Babaei ◽  
Mohammad Shadnam Zarbil ◽  
Mehran Sabahi
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Harmonic Distortion ◽  
Power Source ◽  
Voltage Source ◽  
Basic Unit ◽  
Dc Voltage ◽  
Multilevel Inverters ◽  
Single Phase Inverter ◽  
Cascaded Multilevel Inverter

In this paper, a new topology for cascaded multilevel inverters based on quasi Z-source converter is proposed. In the proposed topology, the magnitude of output voltage is not limited to dc voltage source, while the magnitude of output voltage of conventional cascaded multilevel inverters is limited to dc voltage source. In the proposed topology, the magnitude of output voltage can be increased by controlling the duty cycle of shoot-through (ST) state, transformer turn ratio, and the number of switched inductors in the Z-source network. As a result, there is no need for extra dc–dc converter. In the proposed topology, the total harmonic distortion (THD) is decreased in comparison with the conventional Z-source inverters. The proposed topology directly delivers power from a power source to load. In addition, in the proposed basic unit, higher voltage gain is achieved in higher modulation index which is an advantage for the proposed base unit. The performance of the proposed topology is verified by the experimental results of five-level single-phase inverter.

scholarly journals Compare the Symmetric Hybridized Cascaded MLI with 17 levels with the Asymmetric Switched Capacitor MLI Topologies for Dynamic Loading

2021 ◽  
Vol 9 (VII) ◽  
pp. 1951-1958
Author(s):  
Jayesh B. Patil
Keyword(s):  
Renewable Energy ◽  
Dynamic Loading ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Switched Capacitor ◽  
Matlab Simulink ◽  
Energy Applications ◽  
Load Disturbance

This article builds a symmetric hybridized cascaded a switching capacitor unit in a multilayer inverter and compares it to For 17 level inverters, A switched capacitor unit is utilized with an asymmetric multilevel inverter. In the symmetric hybridized multilevel inverter design, a In the midst of a dual-input dc source, there is a bi-directional switch is utilized to create a modified H-bridge inverter with a five-level output voltage instead of three. In the proposed scenario, In an asymmetric multilevel inverter, the switched capacitor unit substitutes the dc sources. which enlarges By a factor of two, The output voltage has been increased. and the voltage levels at the loads are increased by a factor of two. MATLAB-SIMULINK was used to verify the suggested topology using the staircase modulation approach. The findings show that multilayer inverter topologies with low total harmonic distortion, fewer switches, With greater levels of output voltage are better stable during load disturbance circumstances, making them ideal for renewable energy applications.

scholarly journals Control of Cascaded H-Bridge Multilevel Inverter Based on Optimum Regulation of Switching Angles, and the FPGA Implementation

2019 ◽  
Vol 3 (1) ◽  
Author(s):  
Hatef Firouzkouhi
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Fpga Implementation ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Switching Pattern ◽  
Multi Level ◽  
Simulation Results ◽  
Polynomial Term

A new concept in control of cascaded H-Bridge multi-level inverters is proposed in this paper. According to this concept, switching angles are considered to be independent from the fundamental voltage. A polynomial term is presented to show the relation between switching angles and DC voltages. Based on this concept, Total Harmonic Distortion (THD) calculations are updated and proved to be independent from the fundamental voltage. Thus, once calculated for minimum THD, the switching pattern can be used for any required level of output voltage. To examine the effectiveness of the proposed method, it is applied in control of an eleven level inverter. The simulation results are demonstrated and verified through experiments with a setup controlled by Xilinx SPARTAN3 family FPGA (XC3S400-PQG208).

scholarly journals Micro controller based asymmetrical multilevel inverter

2019 ◽  
Vol 8 (1) ◽  
pp. 18
Author(s):  
Arun V. ◽  
Prabaharan N.
Keyword(s):  
Real Time ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Switching Scheme ◽  
High Quality ◽  
Multilevel Inverters ◽  
Switching Losses ◽  
Embedded Controller

This paper presents the Asymmetrical multilevel inverter with 1:3 voltage propagation. Switching pulse for Asymmetrical multilevel inverter are generated using embedded controller in m-file using MATLAB. The Asymmetrical multilevel inverter with 1:3 voltage propagation can produce high quality output voltage with less number of switches and voltage sources compare to conventional multilevel inverters. Contrasting other switching schemes, the proposed Switching scheme significantly reduces the Total Harmonic Distortion (THD) and minimize switching losses and reduces the complexity. To evaluate the developed scheme, simulations are carried out through MATLAB and real time implementations are done through microcontroller ARM Cortex™-M0 Core. The simulation and hardware results are presented.

scholarly journals Cascaded single-phase, PWM multilevel inverter with boosted output voltage

2020 ◽  
Vol 39 (2) ◽  
pp. 589-599
Author(s):  
D.B.N. Nnadi ◽  
S.E. Oti ◽  
C.I. Odeh
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Harmonic Distortion ◽  
Input Voltage ◽  
Unit Cell ◽  
Multilevel Inverter ◽  
Voltage Source ◽  
Discharge Unit ◽  
Bridge Circuits ◽  
Charge Discharge

Splitting of a dc voltage source with two capacitors has been the approach in generating 5-level output voltage with single- and three-phase full-bridge circuits and added bidirectional switch. Associated with this configuration is the problem of voltage imbalance between the splitting capacitors. In addition, the inverter output voltage magnitude is obviously limited to the value of the split input voltage source. Presented in this paper is a unit topology for single-phase 5-level multilevel inverter, MLI. It simply consists of a full-bridge circuit, a capacitor, charge-discharge unit and a dc source. The charge-discharge unit with the capacitor is the interface between the full-bridge and the dc source. The proposed unit cell can generate a 5-level output voltage waveform whose peak value is twice the input voltage value. For higher output voltage level, a cascaded structure of the developed unit cell is presented. Comparing the proposed inverter with CHB inverter and some recent developed MLI topologies, it is found that the proposed inverter configuration generates higher output voltage value, at reduced component-count, than other topologies, for a specified number of dc input voltages. For two cascaded modules, simulation and experimental verifications are carried out on the proposed inverter topology for an R-L load. Keywords: Cascaded multilevel, Inverter, total harmonic distortion, topologies, waveform

scholarly journals MATLAB/simulink study of multi-level inverter topologies using minimized quantity of switches

2017 ◽  
Vol 7 (1.5) ◽  
pp. 209
Author(s):  
B.Vijaya Krishna ◽  
B. Venkata Prashanth ◽  
P. Sujatha
Keyword(s):  
Harmonic Distortion ◽  
Pulse Generation ◽  
Multilevel Inverter ◽  
Matlab Simulink ◽  
Multilevel Inverters ◽  
Energy Applications ◽  
Electrical Drives ◽  
Switching Losses ◽  
Trigger Circuit ◽  
Inverter Topology

Multilevel Inverters (MLI) have very good features when compared to Inverters. But using more switches in the conventional configuration will reduce its application in a wider range. For that reason a modified 7-level MLI Topology is presented. This new topology consists of less number of switches that can be reduced to the maximum extent and a separate gate trigger circuit. This will reduce the switching losses, reduce the size of the multilevel inverter, and cost of installation. This new topology can be used in Electrical drives and renewable energy applications. Performance of the new MLI is tested via. Total harmonic distortion. This construction structure of this multilevel inverter topology can also be increased for 9-level, 11-level and so on and simulated by the use of MATLAB/SIMULINK. A separate Carrier Based PWM Technique is used for the pulse generation in this configuration.

Simulation and Analysis of Novel Extendable Multilevel Inverter Topology

2019 ◽  
Vol 28 (06) ◽  
pp. 1950089 ◽  
Author(s):  
V. Thiyagarajan ◽  
P. Somasundaram ◽  
K. Ramash Kumar
Keyword(s):  
Single Phase ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Voltage Waveform ◽  
Dc Voltage ◽  
Switching Losses ◽  
Comparison Results ◽  
Symmetrical Condition ◽  
Gate Driver ◽  
Inverter Topology

Multilevel inverter (MLI) has become more popular in high power, high voltage industries owing to its high quality output voltage waveform. This paper proposes a novel single phase extendable type MLI topology. The term ‘extendable’ is included since the presented topology can be extended with maximum number of dc voltage sources to synthesize larger output levels. This topology can be operated in both symmetrical and asymmetrical conditions. The major advantages of the proposed inverter topology include minimum switching components, reduced gate driver circuits, less harmonic distortion and reduced switching losses. The comparative analysis based on the number of switches, dc voltage sources and conduction switches between the proposed topology and other existing topologies is presented in this paper. The comparison results show that the proposed inverter topology requires fewer components. The performance of the proposed MLI topology has been analyzed in both symmetrical and asymmetrical conditions. The simulation model is developed using MATLAB/SIMULINK software to verify the performance of the proposed inverter topology and also the feasibility of the presented topology during the symmetrical condition has been validated experimentally.

scholarly journals Single-Phase Inverter Deadbeat Control with One-Carrier-Period Lag

Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 154
Author(s):  
Wei Yao ◽  
Jiamin Cui ◽  
Wenxi Yao
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Harmonic Distortion ◽  
Voltage Source ◽  
Current Loop ◽  
Deadbeat Control ◽  
Additional Advantage ◽  
Power Sources ◽  
Pwm Inverter ◽  
Single Phase Inverter

This paper presents a novel digital control scheme for the regulation of single-phase voltage source pulse width modulation (PWM) inverters used in AC power sources. The proposed scheme adopts two deadbeat controllers to regulate the inner current loop and the outer voltage loop of the PWM inverter. For the overhead of digital processing, the change of duty of PWM lags one carrier period behind the sampling signal, which is modeled as a first-order lag unit in a discrete domain. Based on this precise modeling, the deadbeat controllers make the inverter get a fast dynamic response, so that the inverter’s output voltage is obtained with a very low total harmonic distortion (THD), even when the load is fluctuating. The parameter sensitivity of the deadbeat control was analyzed, which shows that the proposed deadbeat control system can operate stably when the LC filter’s parameters vary within the range allowed. The experimental results of a 2kW inverter prototype show that the THD of the output voltage is less than 3% under resistive and rectifier loads, which verifies the feasibility of the proposed scheme. An additional advantage of the proposed scheme is that the parameter design of the controller can be fully programmed without the experience of a designer.

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