scholarly journals Design and Analyses of Multi-Carrier Pulse Width Modulation Techniques for Double Level Circuit Based Cascaded H-Bridge Multilevel Inverter

2021 ◽  
Vol 23 (2) ◽  
pp. 131-136
Author(s):  
Aneel Kumar Maheshwari ◽  
Mukhtiar Ahmed Mahar ◽  
Abdul Sattar Larik ◽  
Abdul Hameed Soomro
Keyword(s):  
Power Quality ◽  
High Power ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Voltage Waveform ◽  
Switching Losses ◽  
Symmetrical Model ◽  
Multi Level ◽  
Phase Arrangement

The paper introduces the cascaded H-Bridge multi-level inverter with single-phase arrangement connected series with full-bridge inverter and CHBMLI configuration integrated with Double level circuit is proposed to reduce the harmonic distortion to get high power quality. In the proposed configuration, a half-bridge inverter has been implemented to increase the output voltage waveform nearly twice as compared with the conventional Cascaded H-Bridge MLI. For high Power quality, the output voltage waveform with the reference of sinusoidal, the phase opposition disposition carrier arrangement has been utilized in PWM for producing gate pulse of switches. The high waveform of output voltage achieved with the less no of switches, less % THD distortion, less conduction and switching losses. The purposed symmetrical model of CHBMLI is successfully verified using MATLAB based on simulation with DLC configuration.

scholarly journals Solar Photovoltaic System-Based Reduced Switch Multilevel Inverter for Improved Power Quality

2022 ◽  
Vol 4 (1) ◽  
pp. 1-13
Author(s):  
Madhu Andela ◽  
Ahmmadhussain Shaik ◽  
Saicharan Beemagoni ◽  
Vishal Kurimilla ◽  
Rajagopal Veramalla ◽  
...  
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Photovoltaic System ◽  
Solar Photovoltaic ◽  
Switching Losses ◽  
Minimum Number ◽  
Multi Level ◽  
Solar Photovoltaic System

This paper deals with a reduced switch multi-level inverter for the solar photovoltaic system-based 127-level multi-level inverter. The proposed technique uses the minimum number of switches to achieve the maximum steps in staircase AC output voltage when compared to the flying capacitor multi-level inverter, cascaded type multilevel inverter and diode clamped multi-level inverter. The use of a minimum number of switches decreases the cost of the system. To eliminate the switching losses, in this topology a square wave switch is used instead of pulse width modulation. Thereby the total harmonic distortion (THD) and harmonics have been reduced in the pulsating AC output voltage waveform. The performance of 127-level MLI is compared with 15 level, 31-level and 63-level multilevel inverters. The outcomes of the solar photovoltaic system-based 127-level multi-level inverter have been simulated in a MATLAB R2009b environment.

Simulation and dSPACE Based Implementation of Various PWM Strategies for A New H-Type FCMLI Topology

2015 ◽  
Vol 6 (3) ◽  
pp. 615
Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
T.S. Anandhi ◽  
B. Shanthi
Keyword(s):  
High Voltage ◽  
High Power ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Crest Factor ◽  
Third Harmonic ◽  
Switching Losses ◽  
Three Phase ◽  
Inverter Topology

<p>Depending on the number of levels in output voltage, inverters can be divided into two categories: two level inverter and Multi Level Inverters (MLIs). An inverter topology for high voltage and high power applications that seems to be gaining interest is the MLI. In high power and high voltage applications, the two level inverters have some limitations in operating at high frequency mainly due to switching losses and constraints of device rating.In this paper, a three phase H + type FCMLI (Flying Capacitor MLI) using sinusoidal reference, third harmonic injection reference, 60 degree reference and stepped wave reference are initially developed using SIMULINK and then implemented in real time environment using dSPACE. In H-type FCMLI with R-load it is inferred that bipolar COPWM-C provides output with relatively low distortion for 60 degree reference and bipolar COPWM-C strategy is found to perform better since it provides relatively higher fundamental RMS output voltage for THI reference. The five level output voltages of the chosen MLIs obtained using the MATLAB and dSPACE based PWM (Pulse Width Modulation) strategies and the corresponding %THD (Total Harmonic Distortion), V<sub>RMS</sub> (fundamental), CF (Crest Factor) and FF (Form Factor) are presented and analyzed.</p>

scholarly journals Performance Research of Seven Level Multi-Level Inverter with Reduced Switches using Various PWM Techniques

2019 ◽  
Vol 8 (2S8) ◽  
pp. 1149-1154
Keyword(s):  
High Power ◽  
Harmonic Distortion ◽  
Total Harmonic Distortion ◽  
Switching Topology ◽  
Switching Loss ◽  
Medium Voltage ◽  
Switching Losses ◽  
Multi Level ◽  
Low Efficiency ◽  
Performance Research

A inverter is basically a device that usually converts DC to AC voltage without causing any power loss, applicable to only low to medium voltage applications. But in case of medium to high power applications, it has demerits like high switching losses, reduced cost and low efficiency. To overcome these demerits a Multilevel inverter applicable to high voltage and high-power applications which have low total harmonic distortion (THD) is introduced. This paper is mainly focused on seven-level inverter with five switches and four dc sources. with low total harmonic distortion, less switching loss without adding any complexity to the circuit. The switching topology is integrated with various SPWM techniques like Phase Disposition (PD), Phase Opposition Disposition (POD) and Anti Phase Opposition Disposition (APOD). For better performance of the inverter above three PWM techniques will be compared and analyzed to find the low THD configuration. The simulation of switching topology is done by MATLAB/Simulink.

Research on the High Frequency Realization of High-Power Inverter

2011 ◽  
Vol 383-390 ◽  
pp. 1077-1083
Author(s):  
Run Hua Liu ◽  
Gang Wang
Keyword(s):  
High Power ◽  
High Frequency ◽  
Output Voltage ◽  
Harmonic Distortion ◽  
Soft Switching ◽  
Multilevel Inverter ◽  
Switching Frequency ◽  
Switching Losses ◽  
Simulation And Experiment

The paper presents the inverter method which based on cascade multilevel inverter and MOSFET-assisted soft-switching of IGBT and modulation strategy against the double requirement of high-power inverter and high frequency. The method can effectively improve the output voltage, reduce harmonic distortion and switching losses, improve the switching frequency and meet the double requirement of the high-power inverter and high frequency. The method proved to be feasible by simulation and experiment.

A new tapped sources stack succored modified HX bridge MLI

Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Kannan Chandrasekaran ◽  
Nalin Kant Mohanty ◽  
Selvarasu Ranganathan
Keyword(s):  
High Power ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Renewable Energy Sources ◽  
Harmonic Distortion ◽  
Content Type ◽  
Multiple Input ◽  
Field Programmable ◽  
Simulation And Experiment ◽  
Practical Implications

Purpose Multilevel inverter (MLI) is a prevailing sensible alternative to two-level inverters that offer a high-quality output voltage waveform, wherein the multiple input direct current (DC) levels are established by using isolated DC sources, batteries and renewable energy sources. The purpose of this paper is to develop MLI to offer lower total harmonic distortion (THD), higher output voltage levels and reduced switching components for high power applications. Design/methodology/approach In this paper, a new tapped sources stack succored modified HX bridge MLI (TSSSMHXBMLI) topology is proposed which includes two modules, such as tapped sources stack (TSS) and modified HX bridge inverter, which perform their function in a single stage. Also, this paper outlines the formulaic implementation of the multicarrier/sub-harmonic pulse width modulation (MCPWM/SHPWM) in a Xilinx Spartan3E-500 field programmable gate array (FPGA) is suitable for the developed MLI. Findings The feasibility of the suggested topology is well proved by both simulation and experiment results. Practical implications This paper examines a new topology of TSSSMHXBMLI with a view to minimize total count of switching components against basic MLI topologies. The operating sequence of the suggested TSSSMHXBMLI topology is verified with the simulation study followed by an experimental investigation. Originality/value The simulation and experimental results of suggested MLI topology reveals to obtain lower THD, higher output voltage levels and reduced switching components for high power applications.

An Improved ANFIS with Aid of ALO Technique for THD Minimization of Multilevel Inverters

2018 ◽  
Vol 27 (12) ◽  
pp. 1850193 ◽  
Author(s):  
Roy Francis ◽  
D. Meganathan
Keyword(s):  
Output Voltage ◽  
Fitness Function ◽  
Harmonic Distortion ◽  
Objective Functions ◽  
Voltage Waveform ◽  
Swarm Optimization ◽  
Multilevel Inverters ◽  
Optimal Outcomes ◽  
Proposed Model ◽  
Multi Level

In this study, an artificial intelligent (AI) technique is proposed for minimizing the total harmonic distortion (THD) of the multi-level inverter (MLI). An AI technique is a mixture of an ALO and ANFIS, which controls the parameters of the inverter. The innovation of the proposed technique is improving the performance of the MLI, which is reducing the THD based on the output voltage waveform. Normally, the output voltage of the inverter is based on the switching angle of MLI. Then the proposed technique is utilized to optimize the switching angle and THD of the inverter. Here, the ALO is used to analyze the switching angle of the MLI with the aid of the fitness function. ANFIS is familiar with optimizing the switching angle from the ALO algorithm output. By the implementation of the proposed technique, decrease the value of THD in the MLI for gathering the performance of the system. Asymmetrical MLI is used in the proposed model and it wishes to separate DC supply to activate. For skilled activation, the optimal outcomes and the objective functions are well-definite and recognize their restriction similarly. The proposed technique was realized in MATLAB/Simulink platform and compared with the prevailing techniques such as particle swarm optimization (PSO)-ANFIS, genetic algorithm (GA)-Artificial Neural Networks (ANN) and ANN-ALO.

scholarly journals A Survey: Space Vector PWM (SVPWM) in 3φ Voltage Source Inverter (VSI)

2018 ◽  
Vol 8 (1) ◽  
pp. 11 ◽  
Author(s):  
Shalini Vashishtha ◽  
K.R. Rekha
Keyword(s):  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Voltage Source ◽  
Maximum Output ◽  
Control Mechanisms ◽  
Voltage Source Inverter ◽  
Space Vector Pwm ◽  
Space Vector ◽  
Switching Losses

Since last decades, the pulse width modulation (PWM) techniques have been an intensive research subject. Also, different kinds of methodologies have been presented on inverter switching losses, inverter output current/ voltage total harmonic distortion (THD), inverter maximum output of DC bus voltage. The Sinusoidal PWM is generally used to control the inverter output voltage and it helps to maintains drive performance. The recent years have seen digital modulation mechanisms based on theory of space vector i.e. Space vector PWM (SVPWM). The SVPWM mechanism offers the enhanced amplitude modulation indexes (MI) than sinusoidal PWM along with the reduction in the harmonics of inverter output voltage and reduced communication losses. Currently, the digital control mechanisms have got more attention than the analog counterparts, as the performance and reliability of microprocessors has increased. Most of the SVPWM mechanisms are performed by using the analog or digital circuits like microcontrollers and DSPs. From the recent study, analysis gives that use of Field Programmable Gate Arrays (FPGA) can offer more efficient and faster solutions. This paper discusses the numerous existing research aspects of FPGA realization for voltage source inverter (VSI) along with the future line of research.

scholarly journals Design and Simulation of Novel 11-level Inverter Scheme with Reduced Switches

2018 ◽  
Vol 8 (5) ◽  
pp. 3536
Author(s):  
R. Palanisamy ◽  
Gaurav Singh ◽  
Priyanka Das ◽  
D. Selvabharathi ◽  
Sourav Sinha ◽  
...  
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Output Current ◽  
Controlled Switching ◽  
Switching Losses ◽  
Voltage Stress ◽  
Sinusoidal Pulse Width Modulation ◽  
Switching Devices

This work recommends the performance of coupled inductor based novel 11-level inverter with reduced number of switches. The inverter which engender the sinusoidal output voltage by the use of split inductor with minimised total harmonic distortion (THD). The voltage stress on each controlled switching devices, capacitor balancing and switching losses can be reduced. The proposed system which gives better controlled output current and improved output voltage with moderate THD value. The switching devices of the system are controlled by using multicarrier sinusoidal pulse width modulation algorithm by comparing the carrier signals with sinusoidal signal. The simulation and experimental results of the proposed 11-level inverter system outputs are established using matlab/Simulink and dsPIC microcontroller respectively.<br /><br />

scholarly journals Real-Time Selective Harmonic Mitigation Technique for Power Converters Based on the Exchange Market Algorithm

Energies ◽  
2020 ◽  
Vol 13 (7) ◽  
pp. 1659
Author(s):  
Abraham Marquez Alcaide ◽  
Jose I. Leon ◽  
Marta Laguna ◽  
Francisco Gonzalez-Rodriguez ◽  
Ramon Portillo ◽  
...  
Keyword(s):  
Real Time ◽  
High Power ◽  
Pulse Width Modulation ◽  
Power Converters ◽  
Harmonic Distortion ◽  
Harmonic Spectrum ◽  
Exchange Market ◽  
Switching Losses ◽  
Harmonic Mitigation ◽  
Level Converter

Hand-in-hand with the smart-grid paradigm development, power converters used in high-power applications are facing important challenges related to efficiency and power quality. To overcome these issues, the pre-programmed Pulse-Width Modulation (PWM) methods have been extensively applied to reduce the harmonic distortion with very low power switching losses for high-power converters. Among the pre-programmed PWM techniques, Selective Harmonic Elimination (SHE) has been the prevailing solution, but recently, Selective Harmonic Mitigation (SHM) stands as a superior alternative to provide further control of the harmonic spectrum with similar losses. However, the large computational burden required by the SHM method to find a solution confines it as an off-line application, where the switching set valid solutions are pre-computed and stored in a memory. In this paper, for the first time, a real-time implementation of SHM using an off-the-shelf mid-range microcontroller is presented and tested. The Exchange Market Algorithm (EMA), initially focused on optimizing financial transactions, is considered and executed to achieve the SHM targets. The performance of the EMA-based SHM is presented showing experimental results considering a reduced number of switching angles applied to a specific three-level converter, but the method can be extrapolated to any other three-level converter topology.

STUDY ON THE PERFORMANCE OF TWO TOPOLOGY MULTILEVEL INVERTER

2016 ◽  
Vol 78 (5-8) ◽  
Author(s):  
N.S.M. Nazar ◽  
S. Thanakodi ◽  
N.A. Othman ◽  
H.D.M. Hidzir ◽  
M.S. Mat
Keyword(s):  
High Power ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Harmonic Spectrum ◽  
Multilevel Inverter ◽  
Modulation Index ◽  
Multilevel Inverters ◽  
Voltage Output ◽  
Model And Simulation

It has been accepted that conventional inverters have limitation dealing with high voltage and high power applications. Lately, multilevel inverters are popular for high power applications due to its improved harmonic profile and increased power ratings. There are various literatures regarding topology and control techniques of multilevel inverters. This paper presents the performance of two Flying Capacitor Multilevel Inverter (FCMI) topologies particularly a 3-level and 5-level multilevel inverters. Besides that, concept of the topologies and its modulation techniques were described. Sinusoidal pulse width modulation (SPWM) techniques were utilized in this paper as the topologies control strategy. Two control parameters, namely the amplitude modulation index, ma and the frequency modulation index, mfwere varied in order to control the output voltage of the inverters. The model and simulation study were carried out using Matlab/Simulink software. Analyses on the performance of the two topologies were based on the fundamental voltage, output voltage waveform, output harmonic spectrum and total harmonic distortion (THD). It’s found that the five level FCMI have shown better performance in terms of THD compared to the three level FCMI in all conditions of varied ma and mf. Based on the study also, five level FCMI shows a better voltage output waveform; close to a sinusoidal waveform compared to the three level FCMI.

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