scholarly journals Single Phase Asymmetrical Cascaded MLI with Extreme Output Voltage Levels to Switch Ratio

2018 ◽  
Vol 9 (2) ◽  
pp. 712
Author(s):  
Mahrous Ahmed ◽  
Essam Hendawi ◽  
Mohamed K. Metwaly
Keyword(s):  
Fundamental Frequency ◽  
Pulse Width ◽  
Output Voltage ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Modulation Index ◽  
Pwm Control ◽  
Inductive Load ◽  
Control Schemes ◽  
Simulation Results

This paper proposes an asymmetrical cascaded single phase H-bridge inverter. The proposed inverter consists of two modules with unequal and isolated dc sources. Each module is composed of dc source, conventional four switches H-bridge and single bidirectional switch. To increase the output voltage levels, the tertiary ratio, 1:3, between its two dc sources is adopted. Both the fundamental frequency and the multicarrier pulse width modulation (PWM) control schemes are employed to generate switches signals. By controlling the inverter modulation index, the proposed inverter can generate an output voltage having up to seventeen levels by using only two modules. The proposed topology has also the feature of modularity which means that it can be extended to any levels by adding new modules. The proposed topology is simulated using an inductive load and some selected simulation results have been provided to validate the proposed inverter.

Analysis and simulation of a single-phase seven-level inverter controlled by modified sinusoidal PWM technique

2021 ◽  
pp. 2150024
Author(s):  
V. srinath ◽  
Man Mohan Agarwal ◽  
D. K. Chaturvedi
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Optimization Technique ◽  
Reference Signal ◽  
Harmonic Distortion ◽  
Modulation Index ◽  
Reference Signals ◽  
Sinusoidal Pulse Width Modulation

In this paper, a modified Sinusoidal Pulse width Modulation (MSPWM) technique and a modified single-phase H-bridge seven-level inverter is proposed. The switching pulses for the proposed seven-level inverter are generated using a single triangular carrier waveform, a fully rectified sinusoidal signal, and three stepped reference signals (Uref1, Uref2 and Uref3). Using optimization technique, the magnitude of the stepped reference signal is determined so that the total harmonic distortion (THD) of the output voltage waveform is minimum and the fundamental component, RMS value of the voltage is improved for a given modulation index Ma as compared to the Sinusoidal Pulse width Modulation (SPWM). By the implementation of the new scheme, the seven-level of the inverter output voltage level (+Vdc, +2Vdc/3, +Vdc/3, 0, −Vdc, −2Vdc/3, −Vdc) is obtained for any given modulation index. Similarly, if only two stepped reference signals are used then the inverter will act as a five-level inverter for any modulating index ma. The proposed MSPWM and seven-level inverter are simulated on MATLAB/SIMULINK for R, R-L load and on a single-phase capacitor-start and capacitor-start-run Induction Motor.

scholarly journals Algorithim to control output voltage and reduce the ripple of input current in quasi switched boost inverter

2021 ◽  
Vol 4 (2) ◽  
pp. first
Author(s):  
Xuan-Vinh Le ◽  
Duc-Minh Nguyen ◽  
Viet-Anh Truong ◽  
Thanh-Hai Quach
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Short Circuit ◽  
Modulation Index ◽  
Duty Ratio ◽  
Electrical Systems ◽  
Boost Factor ◽  
Control Output ◽  
Current Ripple

In recent years, the quasi -switched boost inverter uses widely in electrical systems. This paper proposes a method to control the AC output voltage and reduce the current ripple of the booster inductor in the quasi-switched boost inverter (QSBI). The proposed technique base on carrier pulse width modulation with two triangles with phase shifts 90◦. This technique uses the offset function to expand the modulation index and the algorithm for output voltage stabilization based on the adjustment of the boost ratio. The modulation index expansion will reduce the stress voltage on the switches by an average of 16.5% under the simulated conditions. The boost factor base on the short circuit time on the DC / DC booster and the inverter on the zero vectors. So, the duty ratio (of the boost DC / DC) can reduce by the short-circuit pulses that insert in the position of zero vectors, so the inverter is responsible for both boosting and inverting. The combination helps to reduce the current ripple on the boost inductor. Besides that, reducing the short-circuit ratio of DC / DC booster will also reduce the capacity of the booster switch and thereby reduce the production cost. The analysis clarifies the proposed technique. Simulations and experiments evaluate the proposed method.

scholarly journals Improved Capacitor Voltage Balancing Algorithm for a Single-phase T-type Inverter

2021 ◽  
Vol 31.2 (149) ◽  
pp. 15-21
Keyword(s):  
Charge State ◽  
Pulse Width ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Experimental Results ◽  
Modulation Index ◽  
Modulation Method ◽  
Voltage Balancing ◽  
Capacitor Voltage ◽  
Independent Mode

The paper proposes an improved pulse width modulation algorithm to solve the voltage imbalance on DC capacitors for single-phase T-type inverter. By changing the modulation index, the residual states can be applied to the discharge/charge state on the DC capacitors to balance the voltage. The proposed algorithm is validated for application in single-phase T-type inverters in independent mode. The simulation and experimental results have confirmed the effectiveness of the improved pulse width modulation method for single-phase T-type inverter. The paper proposes an improved pulse width modulation algorithm to solve the voltage imbalance on DC capacitors for single-phase T-type inverter. By changing the modulation index, the residual states can be applied to the discharge/charge state on the DC capacitors to balance the voltage. The proposed algorithm is validated for application in single-phase T-type inverters in independent mode. The simulation and experimental results have confirmed the effectiveness of the improved pulse width modulation method for single-phase T-type inverter.

Investigation of Switching Sequences on a Generalized SVPWM Algorithm for Multilevel Inverters

2018 ◽  
Vol 28 (02) ◽  
pp. 1950036 ◽  
Author(s):  
B. Hemanth Kumar ◽  
Makarand M. Lokhande
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Switching Loss ◽  
Voltage Profile ◽  
Switching Sequence ◽  
Multilevel Inverters ◽  
Harmonic Content ◽  
Simulation Results ◽  
Text Location

This paper investigates the various switching sequences on a generalized 60[Formula: see text] distributed coordinate system-based space vector pulse width modulation (SVPWM) algorithm for multilevel inverters. The main focus of this work is to improve the inverter output voltage profile by taking advantage of the redundancy inverter switching states. With the help of SVPWM algorithm, the three nearest vectors have to find out the synthesis of the [Formula: see text] location and then by applying the various optimum switching sequences, the inverter produces less harmonic content in the output voltage compared to the conventional switching sequence. All the switching sequence designs are developed with the help of minimum change detector (MCD) by using switching redundancies in order to reduce inverter switching loss. Simulation results to analyze various sequences on the general SVPWM algorithm are presented in the seven-level cascaded H-bridge (CHB) inverter. To validate the results, hardware results are presented on the seven-level CHB inverter.

scholarly journals Hardware implementation of single phase three-level cascaded h-bridge multilevel inverter using sinusoidal pulse width modulation

2019 ◽  
Vol 10 (2) ◽  
pp. 625
Author(s):  
A. Shamsul Rahimi A. Subki ◽  
Mohd Zaidi Mohd Tumari ◽  
Wan Norhisyam Abd Rashid ◽  
Aiman Zakwan Jidin ◽  
Ahmad Nizammuddin Muhammad Mustafa
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Single Phase ◽  
Hardware Implementation ◽  
Pulse Width Modulation ◽  
Sine Wave ◽  
Multilevel Inverter ◽  
Square Wave ◽  
Output Waveform ◽  
Sinusoidal Pulse Width Modulation

<span lang="EN-US">In this paper a hardware implementation of single-phase cascaded H-bridge three level multilevel inverter (MLI) using sinusoidal pulse width modulation (SPWM) is presented. There are a few interesting features of using this configuration, where less component count, less switching losses, and improved output voltage/current waveform. The output of power inverter consists of three form, that is, square wave, modified square wave and pure sine wave. The pure sine wave and modified square wave are more expensive than square wave. The focus paper is to generate a PWM signal which control the switching of MOSFET power semiconductor. The sine wave can be created by using the concept of Schmitt-Trigger oscillator and low-pass filter topology followed by half of the waveform will be eliminated by using the circuit of precision half-wave rectifier. Waveform was inverted with 180º by circuit of inverting op-amp amplifier in order to compare saw-tooth waveform. Two of PWM signal were produced by circuit of PWM and used digital inverter to invert the two PWM signal before this PWM signal will be passed to 2 MOSFET driver and a 3-level output waveform with 45 Hz was produced. As a conclusion, a 3-level output waveform is produced with output voltage and current recorded at 22.5 Vrms and 4.5 Arms. The value of measured resistance is 0.015 Ω that cause voltage drop around 0.043 V. Based on the result obtained, the power for designed inverter is around 100W and efficiency recorded at 75%.</span>

scholarly journals Implementation of Single Phase Multimode Matrix AC-DC Converter

2019 ◽  
Vol 9 (1) ◽  
Keyword(s):  
Pulse Width ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Industrial Applications ◽  
Prototype Model ◽  
Power Devices ◽  
Variable Voltage ◽  
Control Scheme ◽  
Simulation Results ◽  
Sinusoidal Pulse Width Modulation

This paper proposes a novel topology of multimode matrix AC-DC converter which gives multiple DC outputs using a single AC input. The generated multiple outputs appearing across load has both polarity (Positive and negative DC voltages). The control scheme developed for this converter is consisting of Op_Amps and AND gates and IGBTs are used as power devices. The multiple dc output are synthesized using sinusoidal pulse width modulation technique. A prototype model of proposed converter has been implemented and resultant voltage and current waveforms are analyzed. It has been observed that experimental and simulation results are promising for industrial applications with variable voltage.

scholarly journals Implementation Hardware of single phase H-Bridge Inverter with Selective Harmonic Elimination Pulse Width Modulation Technique

2019 ◽  
Vol 8 (11) ◽  
pp. 1089-1092
Keyword(s):  
Pulse Width ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Modulation Index ◽  
Voltage Source ◽  
Power Electronic ◽  
Efficient Operation ◽  
Harmonic Elimination ◽  
Selective Harmonic Elimination ◽  
Electronic Switches

Recently the use of high power Voltage Source Inverter is increased but the problem of harmonic and switching losses in inverter are also increased because of the use of power electronic switches, which are used for fast and efficient operation. In this paper, for eliminating the harmonics presented in H Bridge inverter during switching operation of the power electronic switches the Selective Harmonic Elimination Pulse Width Modulation (SHEPWM) Technique is used. For H-Bridge operation specific switching angles are calculated by solving nonlinear equation using Newton Raphson method. The result of H-bridge single phase inverter are implemented on hardware with and without SHEPWM technique for eliminated specific 3 rd,5th,7th,9th,11th,13th voltage harmonics are obtained. Comparison of harmonic analysis of H bridge inverter with and without SHEPWM technique is done. In this paper Modulation index (m) is varied to control output voltage amplitude and the results are observed for maximum modulation index.

Hardware Implementation of Cascaded Hybrid Multilevel Inverter with Reduced Number of Switches

2016 ◽  
Vol 3 (2) ◽  
pp. 314
Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
T.S. Anandhi ◽  
R. Bensaraj
Keyword(s):  
Phase Shift ◽  
Pulse Width ◽  
Output Voltage ◽  
Degrees Of Freedom ◽  
Hardware Implementation ◽  
Pulse Width Modulation ◽  
Multilevel Inverter ◽  
Variable Frequency ◽  
Multi Level ◽  
Simulation Results

<p class="JESTECAbstract">This paper presents the comparison of various multicarrier Pulse Width Modulation (PWM) techniques for the Cascaded Hybrid Multi Level Inverter (CHBMLI). Due to switch combination redundancies, there are certain degrees of freedom to generate the five level AC output voltage. This paper presents the use of Control Freedom Degree (CFD) combination. The effectiveness of the PWM strategies developed using CFD are demonstrated by simulation and experimentation.  The simulation results indicate that the chosen five level inverter triggered by the developed Phase Disposition(PD), Phase Opposition and Disposition(POD), Alternate Phase Opposition and Disposition (APOD), Carrier Overlapping (CO), Phase Shift (PS) and Variable Frequency (VF)<strong> </strong>PWM strategies developed are implemented in real time using FPGA. The simulation and experimental outputs closely match with each other validating the strategies presented.</p>

Comparison of Multicarrier PWM Techniques for Cascaded H-Bridge Multilevel Inverter

2017 ◽  
Vol 8 (2) ◽  
pp. 861 ◽  
Author(s):  
Hashim Hasabelrasul ◽  
Xiangwu Yan
Keyword(s):  
High Power ◽  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Power Level ◽  
Power Conversion ◽  
Multilevel Inverter ◽  
Multilevel Inverters ◽  
Simulation Results ◽  
Multicarrier Pwm

<p>One of the preferred choices of electronic power conversion for high power applications are multilevel inverters topologies finding increased attention in industry. Cascaded H-Bridge multilevel inverter is one of these topologies reaching the higher output voltage, power level and higher reliability due to its modular topology. Level Shifted Carrier Pulse Width Modulation (LSCPWM) and Phase Shifted Carrier Pulse Width Modulation are used generally for switching cascaded H-bridge (CHB) multilevel inverters. This paper compares LSCPWM and PSCPWM in terms of total harmonics distortion (THD) and output voltage among inverter cells. Simulation for 21-level CHB inverter is carried out in MATLAB/SIMULINK and simulation results are presented.</p>

scholarly journals A Multicarrier PWM Technique for Five Level Inverter Connected to the Grid

2018 ◽  
Vol 9 (4) ◽  
pp. 1774
Author(s):  
M. Khanfara ◽  
R. El Bachtiri ◽  
M. Boussetta ◽  
K. El Hammoumi
Keyword(s):  
Spectral Analysis ◽  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Passive Filter ◽  
Renewable Power ◽  
Three Phase ◽  
Simulation Results ◽  
Multicarrier Pwm

In this paper, a three-phase multilevel cascaded H-bridge inverter is developed for injecting renewable power energy into the grid through a filter. The main contribution of this work is to reduce the total harmonic distortion (THD) by using a passive filter and to enhance the output voltages by adopting a multicarrier pulse width modulation (MCPWM). The simulation results affirm a good performance of the proposed multicarrier PWM control using a three-phase five-level inverter. The proposed inverter is tested as well as the THD and the spectral analysis of the output voltage are calculated using Simulink/Matlab software.

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