scholarly journals A 75 μW Two-Stage Op-Amp using 0.18μW CMOS Technology for High-Speed Operations

2019 ◽  
Vol 135 (5) ◽  
pp. 1075-1077 ◽  
Author(s):  
K. Shashidhar ◽  
Sreenivasa Rao Ijjada ◽  
B. Naresh
Keyword(s):  
High Speed ◽  
Cmos Technology ◽  
Two Stage ◽  
Op Amp

A High-Speed Fully Differential Telescopic Op-Amp for Active Filter Designs in V2X Applications

2021 ◽  
Author(s):  
Furkan Barin ◽  
Ertan Zencir
Keyword(s):  
High Speed ◽  
Low Voltage ◽  
Supply Voltage ◽  
Active Filter ◽  
Ultra Wideband ◽  
Two Stage ◽  
Fully Differential ◽  
Op Amp ◽  
Current Mirrors ◽  
Design Techniques

In this paper, an ultra-wideband fully differential two-stage telescopic 65-nm CMOS op-amp is presented, which uses low-voltage design techniques such as level shifter circuits and low-voltage cascode current mirrors. The designed op-amp consists of two stages. While the telescopic first stage provides high speed and low swing, the second stage provides high gain and large swing. Common-mode feedback circuits (CMFB), which contain five transistors OTA and sensing resistors, are used to set the first-stage output to a known value. The designed two-stage telescopic operational amplifier has 41.04[Formula: see text]dB lower frequency gain, 1.81[Formula: see text]GHz gain-bandwidth product (GBW) and 51.9∘ phase margin under 5[Formula: see text]pF load capacitance. The design consumes a total current of 11.9[Formula: see text]mA from a 1.2-V supply voltage. Presented fully differential two-stage telescopic op-amp by using low-voltage design techniques is suitable for active filter in vehicle-to-everything (V2X) applications with 120[Formula: see text][Formula: see text]m[Formula: see text]m layout area.

A FAST AND LOW SETTLING ERROR CONTINUOUS-TIME COMMON-MODE FEEDBACK CIRCUIT BASED ON DIFFERENTIAL DIFFERENCE AMPLIFIER

2014 ◽  
Vol 23 (05) ◽  
pp. 1450065 ◽  
Author(s):  
TOHID MORADI KHANESHAN ◽  
SAEED NAGHAVI ◽  
MOJDE NEMATZADE ◽  
KHAYROLLAH HADIDI ◽  
ADIB ABRISHAMIFAR ◽  
...  
Keyword(s):  
Continuous Time ◽  
High Speed ◽  
Cmos Technology ◽  
Common Mode ◽  
Op Amp ◽  
Wide Range ◽  
Differential Difference Amplifier ◽  
Unity Gain ◽  
Folded Cascode ◽  
Speed And Accuracy

A high-speed and high-accuracy continuous-time common-mode feedback block (CMFB) is presented. To satisfy speed and accuracy requirements, some modifications have been applied on differential difference amplifier (DDA) CMFB circuit. The proposed method is applied to a folded cascode op-amp with power supply of 3.3 V. In order to verify the proposed circuit, simulations are done in 0.35 μm standard CMOS technology. In the worst condition when the output common-mode (CM) voltage is initialized to VCC or GND, only 1.1 ns is required to set the output CM voltage on the desired level. Also in a wide range of input CM voltage variations, the deviation of the output CM voltage from reference voltage is less than 6 mV, so simulation results confirm the expected accuracy and speed while simultaneously the proposed CMFB circuit preserves other characteristics of DDA CMFB circuit such as unity gain frequency, 3-dB bandwidth, phase margin and linearity.

scholarly journals A Two Stage Op-Amp Phase Margin Symbolic Expression

2018 ◽  
Vol 210 ◽  
pp. 02040
Author(s):  
Alexandru Gabriel Gheorghe ◽  
Mihai Eugen Marin
Keyword(s):  
Operational Amplifier ◽  
Cmos Technology ◽  
Phase Margin ◽  
Two Stage ◽  
Symbolic Expression ◽  
Op Amp ◽  
Poles And Zeros ◽  
Optimal Set

A phase margin symbolic expression of a two stage Miller compensated operational amplifier is computed in this paper. Using this expression, an analysis to evaluate the influence of the Miller and load capacitance on phase margin is performed. This way, a designer can rapidly choose the optimal set of values to fulfil an imposed phase margin. The phase margin expression is based on poles/zeros symbolic expressions obtained using a symbolic LR algorithm able to compute both the numerical values and the approximate symbolic expressions of poles and zeros of a circuit. The numerical values obtained with this algorithm are compared with those computed by SPECTRE. The example is a two stage Miller compensated operational amplifier designed in a 180nm CMOS technology.

A Dual-Supply Two-Stage CMOS Op-amp for High-Speed Pipeline ADCs Application

2020 ◽  
Vol 67 (4) ◽  
pp. 650-654 ◽  
Author(s):  
Maliang Liu ◽  
Dengquan Li ◽  
Zhangming Zhu
Keyword(s):  
High Speed ◽  
Two Stage ◽  
Op Amp ◽  
Pipeline Adcs

Projected Performance of Sub-10 nm GaN-based Double Gate MOSFETs

2017 ◽  
Vol 2 (2) ◽  
pp. 15-19 ◽  
Author(s):  
Md. Saud Al Faisal ◽  
Md. Rokib Hasan ◽  
Marwan Hossain ◽  
Mohammad Saiful Islam
Keyword(s):  
High Speed ◽  
Field Effect Transistors ◽  
Cmos Technology ◽  
Channel Length ◽  
Capacitive Coupling ◽  
Oxide Semiconductor ◽  
Double Gate ◽  
Short Channel ◽  
Channel Effects ◽  
Silvaco Atlas

GaN-based double gate metal-oxide semiconductor field-effect transistors (DG-MOSFETs) in sub-10 nm regime have been designed for the next generation logic applications. To rigorously evaluate the device performance, non-equilibrium Green’s function formalism are performed using SILVACO ATLAS. The device is turn on at gate voltage, VGS =1 V while it is going to off at VGS = 0 V. The ON-state and OFF-state drain currents are found as 12 mA/μm and ~10-8 A/μm, respectively at the drain voltage, VDS = 0.75 V. The sub-threshold slope (SS) and drain induced barrier lowering (DIBL) are ~69 mV/decade and ~43 mV/V, which are very compatible with the CMOS technology. To improve the figure of merits of the proposed device, source to gate (S-G) and gate to drain (G-D) distances are varied which is mentioned as underlap. The lengths are maintained equal for both sides of the gate. The SS and DIBL are decreased with increasing the underlap length (LUN). Though the source to drain resistance is increased for enhancing the channel length, the underlap architectures exhibit better performance due to reduced capacitive coupling between the contacts (S-G and G-D) which minimize the short channel effects. Therefore, the proposed GaN-based DG-MOSFETs as one of the excellent promising candidates to substitute currently used MOSFETs for future high speed applications.

scholarly journals High-Speed 3D Printing of High-Performance Thermosetting Polymers via Two-Stage Curing

2018 ◽  
Vol 39 (7) ◽  
pp. 1700809 ◽  
Author(s):  
Xiao Kuang ◽  
Zeang Zhao ◽  
Kaijuan Chen ◽  
Daining Fang ◽  
Guozheng Kang ◽  
...  
Keyword(s):  
3D Printing ◽  
High Speed ◽  
High Performance ◽  
Two Stage ◽  
Thermosetting Polymers

scholarly journals Research on aerodynamic characteristics of two-stage axial micro air turbine spindle for small parts machining

2020 ◽  
Vol 12 (12) ◽  
pp. 168781402098437
Author(s):  
Liu Jiang ◽  
Guo Zhiping ◽  
Miao Shujing ◽  
He Xiangxin ◽  
Zhu Xinyu
Keyword(s):  
High Speed ◽  
Aerodynamic Characteristics ◽  
Maximum Efficiency ◽  
Two Stage ◽  
Output Torque ◽  
Air Turbine ◽  
Solid Foundation ◽  
Computational Fluid Dynamics Cfd ◽  
Micro Machine ◽  
Small Parts

In order to meet the requirements of output torque, efficiency and compact shape of micro-spindles for small parts machining, a two-stage axial micro air turbine spindle with an axial inlet and outlet is proposed. Based on the k-ω turbulence model of SST, the flow field and operation characteristics of the two-stage axial micro air turbine spindle were studied using computational fluid dynamics (CFD) combined with an experimental study. We obtained the air turbine spindle under different working conditions of the loss and torque characteristics. When the inlet pressure was 300 KPa, the output speed of the two-stage turbine was 100,000 rpm, 9% higher than that of a single-stage turbine output torque. The total torque reached 6.39 N·mm, and the maximum efficiency of the turbine and the spindle were 42.2% and 32.3%, respectively. Through the research on the innovative structure of the two-stage axial micro air turbine spindle, the overall performance of the principle prototype has been significantly improved and the problems of insufficient output torque and low working efficiency in high-speed micro-machining can be solved practically, which laid a solid foundation for improving the machining efficiency of small parts and reducing the size of micro machine tool.

Sign in / Sign up

Export Citation Format

Share Document