Effect of Growth Conditions on the Reliability of Ultrathin MOS Gate Oxides

1996 ◽  
Vol 428 ◽  
Author(s):  
Tien-Chun Yang ◽  
Krishna C. Saraswat
Keyword(s):  
Gate Oxide ◽  
Interface State ◽  
Growth Conditions ◽  
Physical Stress ◽  
Constant Current ◽  
Strong Function ◽  
Oxidation Rates ◽  
Mos Devices ◽  
State Generation ◽  
Mos Gate

AbstractIn this work we demonstrate that in MOS devices the reliability of ultrathin (< 100Å) gate oxide is a strong function of growth conditions, such as, temperature and the growth rate. In addition, for constant current gate injection the degradation of SiO2 is enhanced as the thickness is reduced. We attribute this to physical stress in SiO2 resulting from the growth process. The degradation is always more for those growth conditions which result in higher physical stress in SiO2. Higher temperatures and slower oxidation rates allow stress relaxation through viscous flow and hence result in SiO2 of better reliability. We also found that for constant current stressing, the interface damage is more at the collecting electrode than at the injecting electrode. ΔDit (stress induced interface state generation) can be reduced after a high temperature Ar post anneal after the gate oxide growth.

Rapid Thermal Oxidation of Lightly Doped Silicon in N2O

1994 ◽  
Vol 342 ◽  
Author(s):  
S.C. Sun ◽  
L.S. Wang ◽  
F.L. Yeh ◽  
T.S. Lai ◽  
Y.H. Lin
Keyword(s):  
Growth Rate ◽  
Thermal Oxidation ◽  
Charge Trapping ◽  
Interface State ◽  
Constant Current ◽  
Mos Capacitor ◽  
Rapid Thermal Oxidation ◽  
Doped Silicon ◽  
State Generation ◽  
First Time

ABSTRACTIn this paper, a detailed study is presented for the growth kinetics of rapid thermal oxidation of lightly-doped silicon in N2O and O2 on (100), (110), and (111) oriented substrates. It was found that (110)-oriented Si has the highest growth rate in both N2O and dry O2, and (100) Si has the lowest rate. There is no “crossover” on the growth rate of rapid thermal N2O oxidation between (110) Si and (111) Si as compared to oxides grown in furnace N2O. Pressure dependence of rapid thermal N2O oxidation is reported for the first time. MOS capacitor results show that the low-pressure (40 Torr) N2O-grown oxides have much less interface state generation and charge trapping under constant current stress as compared to oxides grown in either 760 Torr N2O or O2 ambient.

Ultrathin Gate Dielectric Growth at Reduced Pressure

1994 ◽  
Vol 342 ◽  
Author(s):  
Robert McIntosh ◽  
Carl Galewski ◽  
John Grant
Keyword(s):  
Gate Dielectric ◽  
Charge Trapping ◽  
Cmos Technology ◽  
Interface State ◽  
Constant Current ◽  
Reduced Pressure ◽  
Current Stress ◽  
Ultrathin Oxides ◽  
State Generation ◽  
Improved Characteristics

The Growth of ultrathin oxides in N2O ambient has been a subject of extensive research for submicron CMOS technology. Oxides grown in N2O tend to have a higher charge-to-breakdown, less charge trapping under constant current stress, and less interface state generation under current stress and radiation than conventional oxides grown in oxygen [1,2]. In addition the penetration of boron through N2O oxides is significantly less than through conventional thermal oxides [3]. The improved characteristics of N2O are due to an interfacial pileup of nitrogen atoms [1-3]. Thus the growth of thermal oxides in N2O provides a method for obtaining many of the more favorable aspects of reoxidized-nitrided silicon dioxides, with a much simpler process.

Dependence of Reliability of Ultrathin Mos Gate Oxides on the Fermi Level Positions at Gate and Substrate

1997 ◽  
Vol 473 ◽  
Author(s):  
Tien-Chun Yang ◽  
Navakanta Bhat ◽  
Krishna C. Saraswat
Keyword(s):  
Electric Field ◽  
Fermi Level ◽  
Breakdown Strength ◽  
Gate Oxide ◽  
High Energy ◽  
Constant Current ◽  
Oxide Breakdown ◽  
Mos Devices ◽  
High Energy Electrons ◽  
Substrate Doping

ABSTRACTWe demonstrate that the reliability of ultrathin (< 10 nm) gate oxide in MOS devices depends on the Fermi level position at the gate, and not on the position at the substrate for constant current gate injection (Vg-). The oxide breakdown strength (Qbd) is less for p+ poly-Si gate than for n+ poly-Si gate, but, it is independent of the substrate doping type. The degradation of oxides is closely related to the electric field across the gate oxide, which is influenced by the cathode Fermi level. P+ poly-Si gate has higher barrier height for tunneled electrons, therefore, the cathode electric field must be higher to give the same injection current density. A higher electric field gives more high energy electrons at the anode, and therefore the damage is more at the substrate interface. Different substrate types cause no effect on the oxide electric field, and as a result, they do not influence the degradation.

Radiation-Induced Interface-State Generation in MOS Devices

1986 ◽  
Vol 33 (6) ◽  
pp. 1177-1184 ◽  
Author(s):  
J. R. Schwank ◽  
P. S. Winokur ◽  
F. W. Sexton ◽  
D. M. Fleetwood ◽  
J. H. Perry ◽  
...  
Keyword(s):  
Interface State ◽  
Mos Devices ◽  
State Generation ◽  
Radiation Induced

Ensemble Monte Carlo study of interface-state generation in low-voltage scaled silicon MOS devices

1996 ◽  
Vol 43 (7) ◽  
pp. 1123-1132 ◽  
Author(s):  
J.J. Ellis-Monaghan ◽  
R.B. Hulfachor ◽  
K.W. Kim ◽  
M.A. Littlejohn
Keyword(s):  
Monte Carlo ◽  
Low Voltage ◽  
Monte Carlo Study ◽  
Interface State ◽  
Ensemble Monte Carlo ◽  
Mos Devices ◽  
State Generation

Low Temperature (850 °C) Two-Step N2O Annealed Thin Gate Oxides

1996 ◽  
Vol 428 ◽  
Author(s):  
Chao Sung Lai ◽  
Chung Len Lee ◽  
Tan Fu Lei ◽  
Tien Sheng Chao ◽  
Chun Hung Peng ◽  
...  
Keyword(s):  
Low Temperature ◽  
Gate Dielectric ◽  
Gate Dielectrics ◽  
Charge Trapping ◽  
Interface State ◽  
Constant Current ◽  
Short Channel ◽  
Gate Oxides ◽  
Current Stressing ◽  
State Generation

AbstractThe electrical characteristics of thin gate dielectrics prepared by low temperature (850 °C) two-step N20 nitridation (LTN) process are presented. The gate oxides were grown by wet oxidation at 800 °C and then annealed in N2O at 850 °C. The oxide with N2O anneal, even for low temperature (850 °C), had nitrogen incorporation at oxide/silicon interface. The charge trapping phenomena and interface-state generation (ΔDitm) induced by constant current stressing were reduced and charge-to-breakdown (Qbd) under constant current stressing was increased. This LTN oxynitride was used as gate dielectric for N-channel MOSFET, whose hot-canrier immunity was shown improved and reverse short channel effect (RSCE) was suppressed.

Ultra-thin Gate Oxide Prepared by Nitridation in ND3 for MOS Device Applications

2000 ◽  
Vol 611 ◽  
Author(s):  
Hyungshin Kwon ◽  
Hyunsang Hwang
Keyword(s):  
Gate Dielectric ◽  
Charge Trapping ◽  
Gate Oxide ◽  
Interface State ◽  
Nitridation Process ◽  
Reliability Characteristics ◽  
State Generation ◽  
Device Applications ◽  
Thin Gate Oxide ◽  
Mos Device

ABSTRACTThe electrical and reliability characteristics of ultra-thin gate oxide, annealed in ND3 gas, have been investigated. Compared with a control oxide, which had been annealed in NH3, the ND3-nitrided oxide exhibits a significant reduction in charge trapping and interface state generation. The improvement of electrical and reliability characteristics can be explained by the strong Si-D bond at the Si/SiO2 interface. This nitridation process of gate dielectric using ND3 has considerable potential for future ultra large scaled integration (ULSI) device applications.

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