Polycrystalline Silicon Grown on Porous Silicon-on-Insulator Substrates

1996 ◽  
Vol 452 ◽  
Author(s):  
Klaus Y.J. Hsu ◽  
C. H. Lee ◽  
C. C. Yeh

AbstractInexpensive full-wafer SOI substrates are appealing for various applications such as ULSI. As an attempt to achieve this goal, low-temperature deposition of silicon on novel porous Si-on-insulator (PSOI) substrates was performed in this work. The bottom insulator was obtained by anodically oxidizing a pre-formed porous silicon film in HCl solution. The thickness, uniformity and quality of the resulted bottom oxide layer as well as the residual porous silicon layer above were well-controlled. Low-temperature PECVD growth of silicon on the PSOI wafer was conducted by using the residual porous silicon as the seed. Cross-sectional TEM pictures and electron diffraction patterns showed that poly-Si films were formed on PSOI substrates under the conditions of 98% hydrogen dilution ratio, 20 Watts RF power, and 300°C substrate temperature. Further thermal annealing at 1050°C for 30 minutes significantly enhanced the crystallinity of the deposited films. Combined with the excellent insulation ability of the bottom oxide, the technique is suitable for future inexpensive full-wafer SOI fabrication.

Author(s):  
V. S. Kaushik

Oxidized porous silicon has drawn considerable interest as one of the alternatives for implementing silicon-on-insulator technology. Buried porous layers can be formed by utilizing the preferential pore formation in highly doped silicon during anodic etching in hydrofluoric acid. This porous silicon layer (PSL) can be subsequently oxidized rapidly at low temperatures to yield a device-quality silicon island layer, which is dielectrically isolated from the substrate. Although pores can be formed in both n-type and p-type silicon, the latter has received more attention. This paper presents the results of cross-sectional TEM (XTEM) observations of the microstructure of pores in n+ silicon.Samples used in this study were n- /n+/n- doped silicon (001) wafers which had been anodically etched in a hydrofluoric acid solution to form the PSL in the n+ layer via trenches etched through the n- surface layer.


1985 ◽  
Vol 53 ◽  
Author(s):  
B.-Y Mao ◽  
P.-H. Chang ◽  
H.W. Lam ◽  
B.W. Shen ◽  
J.A. Keenan

ABSTRACTThe effects of post implantation annealing on the properties of buried oxide silicon-on-insulator (SOI) substrates in the temperature range of 1150°C to 1300°C have been studied. Microstructural analyses showed that the crystallinity of the top silicon layer was improved at higher annealing temperature. Lower thermal donor generation at 450°C was observed in SOI annealed at higher temperature. The improvement in microstructure and lower thermal donor generation were correlated to the lower oxygen concentration in the top silicon film.


2007 ◽  
Vol 994 ◽  
Author(s):  
Douglas C. Thompson ◽  
T. L. Alford ◽  
J. W. Mayer ◽  
T. Hochbauer ◽  
J. K. Lee ◽  
...  

AbstractMicrowave heating is used to initiate the ion-cut process for transfer of coherent silicon-layers onto insulator substrates. Hydrogen and boron co-implanted silicon was bonded to an insulative substrate before processing inside a 2.45 GHz, 1300 W cavity applicator microwave system. Sample temperatures measured using a pyrometer were comparable to previous ion – cut studies. Selected samples were further annealed to repair any damage created in the ion implant process. Rutherford backscattering spectrometry and selective area electron diffraction patterns show high crystallinity in transferred layers. RUMP simulation of backscattering spectra and cross-sectional transmission electron microscopy demonstrate that thicknesses of the transferred layers are comparable to previous ion-cut exfoliation techniques. Surface quality as characterized by an atomic force microscope compares well with previous ion-cut studies. Hall measurements were used to characterize electrical properties of transferred layers. The mobility and carrier density of microwave activated ion – cut silicon on insulator processed samples compares well with previous annealing techniques.


1983 ◽  
Vol 12 (6) ◽  
pp. 973-982 ◽  
Author(s):  
Hiroshi Takai ◽  
Tadatsugu Itoh

2020 ◽  
Vol 12 (4) ◽  
pp. 04020-1-04020-5
Author(s):  
A. P. Oksanich ◽  
◽  
S. E. Pritchin ◽  
M. A. Mashchenko ◽  
A. Yu. Bobryshev ◽  
...  

2017 ◽  
Vol 68 (7) ◽  
pp. 53-57 ◽  
Author(s):  
Martin Kopani ◽  
Milan Mikula ◽  
Daniel Kosnac ◽  
Jan Gregus ◽  
Emil Pincik

AbstractThe morphology and chemical bods of p-type and n-type porous Si was compared. The surface of n-type sample is smooth, homogenous without any features. The surface of p-type sample reveals micrometer-sized islands. FTIR investigation reveals various distribution of SiOxHycomplexes in both p-and n-type samples. From the conditions leading to porous silicon layer formation (the presence of holes) we suggest both SiOxHyand SiFxHycomplexes in the layer.


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