The Physical and Electrical Properties of Buried Nitride Soi Structures Synthesized By Nitrogen Ion Implantation

1985 ◽  
Vol 53 ◽  
Author(s):  
C. Slawinski ◽  
B.-Y. Mao ◽  
P.-H. Chang ◽  
H.W. Lam ◽  
J.A. Keenan

ABSTRACTBuried nitride silicon-on-insulator (SOI) structures have been fabricated using the technique of nitrogen ion implantation. The crystallinity of the top silicon film was found to be exceptionally good. The minimum channeling yield, Xmin' was better than 3%. This is comparable to the value observed for single crystal silicon. The buried insulator formed during the anneals has been identified as polycrystalline α-Si3 N4 with numerous silicon inclusions. This nitride, however, has been found to remain amorphous in regions at the center of the implant where the nitrogen concentration exceeds the stoichiometric level of Si3N4. Nitrogen donor formation in the top silicon layer has also been observed.

Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.


Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1118
Author(s):  
Yuan Tian ◽  
Yi Liu ◽  
Yang Wang ◽  
Jia Xu ◽  
Xiaomei Yu

In this paper, a polyimide (PI)/Si/SiO2-based piezoresistive microcantilever biosensor was developed to achieve a trace level detection for aflatoxin B1. To take advantage of both the high piezoresistance coefficient of single-crystal silicon and the small spring constant of PI, the flexible piezoresistive microcantilever was designed using the buried oxide (BOX) layer of a silicon-on-insulator (SOI) wafer as a bottom passivation layer, the topmost single-crystal silicon layer as a piezoresistor layer, and a thin PI film as a top passivation layer. To obtain higher sensitivity and output voltage stability, four identical piezoresistors, two of which were located in the substrate and two integrated in the microcantilevers, were composed of a quarter-bridge configuration wheatstone bridge. The fabricated PI/Si/SiO2 microcantilever showed good mechanical properties with a spring constant of 21.31 nN/μm and a deflection sensitivity of 3.54 × 10−7 nm−1. The microcantilever biosensor also showed a stable voltage output in the Phosphate Buffered Saline (PBS) buffer with a fluctuation less than 1 μV @ 3 V. By functionalizing anti-aflatoxin B1 on the sensing piezoresistive microcantilever with a biotin avidin system (BAS), a linear aflatoxin B1 detection concentration resulting from 1 ng/mL to 100 ng/mL was obtained, and the toxic molecule detection also showed good specificity. The experimental results indicate that the PI/Si/SiO2 flexible piezoresistive microcantilever biosensor has excellent abilities in trace-level and specific detections of aflatoxin B1 and other biomolecules.


2020 ◽  
pp. 100107
Author(s):  
L.G. Michaud ◽  
E. Azrak ◽  
C. Castan ◽  
F. Fournel ◽  
F. Rieutord ◽  
...  

Author(s):  
Wenjun Liu ◽  
Mehdi Asheghi ◽  
K. E. Goodson

Simulations of the temperature field in Silicon-on-Insulator (SOI) and strained-Si transistors can benefit from experimental data and modeling of the thin silicon layer thermal conductivity at high temperatures. This work presents the first experimental data for 20 and 100 nm thick single crystal silicon layers at high temperatures and develops algebraic expressions to account for the reduction in thermal conductivity due to the phonon-boundary scattering for pure and doped silicon layers. The model applies to temperatures range 300–1000 K for silicon layer thicknesses from 10 nm to 1 μm (and even bulk) and agrees well with the experimental data. In addition, the model has an excellent agreement with the predictions of thin film thermal conductivity based on thermal conductivity integral and Boltzmann transport equation, although it is significantly more robust and convenient for integration into device simulators. The experimental data and predictions are required for accurate thermal simulation of the semiconductor devices, nanostructures and in particular the SOI and strained-Si transistors.


2005 ◽  
Vol 34 (11) ◽  
pp. L53-L56 ◽  
Author(s):  
Enxia Zhang ◽  
Jiayin Sun ◽  
Jing Chen ◽  
Zhengxuan Zhang ◽  
Xi Wang ◽  
...  

1984 ◽  
Vol 33 ◽  
Author(s):  
P. Zorabedian ◽  
T. I. Kamins

ABSTRACTTwo scanning methods for laterally-seeded recrystallization of striped silicon-on-insulator/seed structures with an elliptical laser beam are discussed. One method requires repeated remelting of the silicon film and is controlled by the temperature of the substrate, which is locally heated by the beam. This method results in very few defects and single-crystal silicon-on-insulator stripes up to 50 μm wide. The second method involves little remelting and is primarily controlled by the lateral offset of the beam with respect to the stripes. Single-crystal silicon-on-insulator stripes up to 40 μm wide have been obtained, with defects consisting primarily of stacking faults and twins, as well as some grain boundaries. These defects show little effect on MOS transistor leakage current.


1982 ◽  
Vol 13 ◽  
Author(s):  
N. M. Johnson ◽  
H. C. Tuan ◽  
M. D. Moyer ◽  
M. J. Thompson ◽  
D. K. Biegelsen ◽  
...  

ABSTRACTThin-film transistors (TFT) have been fabricated in scanned CO2 laser-crystallized silicon films on bulk fused silica. In n-channel enhancement-mode transistors, it is demonstrated that an excessively large leakage current can be electric-field modulated with a gate electrode located beneath the silicon layer. This dual-gate configuration provides direct verification on bulk glass substrates of back-channel leakage as has recently been demonstrated for beam-crystallized silicon films on thermal oxides over silicon wafers. With the application of deep-channel ion implantation to suppress back-channel leakage, high-peformance TFTs have been fabricated in single-crystal silicon films on fused silica. The results demonstrate that scanned CO 2 laser processing of silicon films on bulk glass can provide the basis for a silicon-on-insulator technology.


1999 ◽  
Vol 564 ◽  
Author(s):  
L. J. Chen ◽  
S. L. Cheng ◽  
S. M. Chang ◽  
Y. C. Peng ◽  
H. Y. Huang ◽  
...  

AbstractLow resistivity TiSi2, CoSi2 and NiSi are the three primary candidates for metal contacts in sub-0.25 μ m devices. In the present paper, we review recent progress in the investigations of lowresistivity contacts, which include enhanced formation of C54-TiSi2 on (001)Si by tensile stress, high temperature sputtering, and interposing Mo or TiN layer, improved thermal stability of C54-TiSi2 by the addition of N2 during Ti sputtering or N implantation in (001)Si, self-aligned formation of CoSi2 on the selective epitaxial growth silicon layer on (001)Si, effects of stress on the epitaxial growth of CoSi2 on (001 )Si, improvement of thermal stability of CoSi2 by nitrogen ion implantation or high temperature sputtering, and improvement of thermal stability of NiSi by nitrogen ion implantation or compressive stress.


2005 ◽  
Vol 128 (1) ◽  
pp. 75-83 ◽  
Author(s):  
Wenjun Liu ◽  
Mehdi Asheghi

Self-heating in deep submicron transistors (e.g., silicon-on-insulator and strained-Si) and thermal engineering of many nanoscale devices such as nanocalorimeters and high-density thermomechanical data storage are strongly influenced by thermal conduction in ultra-thin silicon layers. The lateral thermal conductivity of single-crystal silicon layers of thicknesses 20 and 100nm at temperatures between 30 and 450K are measured using joule heating and electrical-resistance thermometry in suspended microfabricated structures. In general, a large reduction in thermal conductivity resulting from phonon-boundary scattering is observed. Thermal conductivity of the 20nm thick silicon layer at room temperature is nearly 22Wm−1K−1, compared to the bulk value, 148Wm−1K−1. The predictions of the classical thermal conductivity theory that accounts for the reduced phonon mean free paths based on a solution of the Boltzmann transport equation along a layer agrees well with the experimental results.


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