Epitaxial Realignment of In-Situ Doped Polycrystalline Silicon for Advanced BiCMOS Technologies

1999 ◽  
Vol 587 ◽  
Author(s):  
K. Chang ◽  
S.G. Thomas ◽  
T-C. Lee ◽  
R.B. Gregory ◽  
D. O'meara ◽  
...  
Keyword(s):  
Polycrystalline Silicon ◽  
Chemical Vapor ◽  
Layer Growth ◽  
Native Oxide ◽  
Post Deposition Annealing ◽  
Si Substrates ◽  
Si Films ◽  
Post Deposition

AbstractIndustrial feasibility of an in-situ-doped (ISD) polycrystalline Si process using chemical vapor deposition for advanced BiCMOS technologies is presented. ISD As-doped amorphous and polycrystalline Si layers have been deposited on Si substrates at 610°C and 660°C, respectively, with the deposition rate varying from 120 to 128Å /minute. Samples are compared on the basis of having been subjected to a substrate preclean prior to deposition using an HF solution and an in-situ H2 bake. TEM micrographs reveal the presence of a thin (10-15 Å) native oxide at the deposited layer/substrate interface for samples not precleaned. This is confirmed for both the amorphous and polycrystalline Si depositions. However, for the 610°C-deposited samples given the substrate preclean, a polycrystalline structure with partial epitaxial layer growth is observed. Twins and stacking faults are found at the poly Si/single crystal Si interface, causing interfacial roughness. Post-deposition annealing of the Si films typically generates grain growth, but RBS-channeling characterization of the annealed Si provides evidence of some recrystallization, the extent of which is affected by the original growth condition. Analysis shows that the amorphous deposition at 610°C results in a mixture of epitaxial and polycrystalline Si. Epitaxial realignment of the polycrystalline Si film by post deposition annealing can result in significantly improved device performance.

Low-Temperature LPCVD MEMS Technologies

2002 ◽  
Vol 729 ◽  
Author(s):  
Roger T. Howe ◽  
Tsu-Jae King
Keyword(s):  
Silicon Germanium ◽  
Polycrystalline Silicon ◽  
Rf Mems ◽  
Sige Layer ◽  
Copper Metallization ◽  
Si Films ◽  
P Type ◽  
Mems Process ◽  
Post Deposition

AbstractThis paper describes recent research on LPCVD processes for the fabrication of high-quality micro-mechanical structures on foundry CMOS wafers. In order to avoid damaging CMOS electronics with either aluminum or copper metallization, the MEMS process temperatures should be limited to a maximum of 450°C. This constraint rules out the conventional polycrystalline silicon (poly-Si) as a candidate structural material for post-CMOS integrated MEMS. Polycrystalline silicon-germanium (poly-SiGe) alloys are attractive for modular integration of MEMS with electronics, because they can be deposited at much lower temperatures than poly-Si films, yet have excellent mechanical properties. In particular, in-situ doped p-type poly-SiGe films deposit rapidly at low temperatures and have adequate conductivity without post-deposition annealing. Poly-Ge can be etched very selectively to Si, SiGe, SiO2 and Si3N4 in a heated hydrogen peroxide solution, and can therefore be used as a sacrificial material to eliminate the need to protect the CMOS electronics during the MEMS-release etch. Low-resistance contact between a structural poly-SiGe layer and an underlying CMOS metal interconnect can be accomplished by deposition of the SiGe onto a typical barrier metal exposed in contact windows. We conclude with directions for further research to develop poly-SiGe technology for integrated inertial, optical, and RF MEMS applications.

Migration-Enhanced Molecular Beam Epitaxial Growth and Characterization of GaAs on Si Substrates

1988 ◽  
Vol 144 ◽  
Author(s):  
J.H. Kim ◽  
S. Sakai ◽  
J.K. Liu ◽  
G. Raohakrishnan ◽  
S.S. Chang ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Molecular Beam ◽  
Chemical Vapor ◽  
Organic Chemical ◽  
Cross Sectional ◽  
Light Emitting ◽  
Si Substrates ◽  
Molecular Beam Epitaxial

ABSTRACTWe first report on migration-enhanced molecular beam epitaxial (MEMBE) growth and characterization of the GaAs layers on Si substrates (GaAs/Si). Excellent surface morphology GaAs layers were successfully grown on (100) Sisubstrates misoriented 4 toward [110] direction. The MEMBE growth method isdescribed and material properties are compared with those of normal two-step MBE-grown or in-situ annealed layers. Micrographs of cross-sectional view transmission electron microscopy (TEM) and scanning surface electron microscopy (SEM) of MEMBE-grown GaAs/Si showed dislocation densities of 107 cm-2 over ten times lower than those of two-step MBE-grown or in-situ annealedlayers. AlGaAs/GaAs double heterostructure lasers and light-emitting diodeshave been successfully grown on MEMBE GaAs/Si by both metal organic chemical vapor deposition and liquid phase epitaxy. MOCVD-grown lasers showed peak output power as high as 184 mW/facet, pulsed threshold currents as low as150 mA at 300 K, and differential quantum efficiencies of up to 30 %. The LPE-grown light-emitting diodes showed output powers of 1.5 mW and external quantum efficiencies of 3.3 mW/A per facet.

In Situ Spectroscopic Ellipsometry Study of the Oxide Etching and Surface Damaging Processes on Silicon Under Hydrogen Plasma

1999 ◽  
Vol 591 ◽  
Author(s):  
I.M. Vargas ◽  
J.Y. Manso ◽  
J.R. Guzmán ◽  
B.R. Weiner ◽  
G. Morell
Keyword(s):  
Spectroscopic Ellipsometry ◽  
Hydrogen Plasma ◽  
Chemical Vapor ◽  
Surface Damage ◽  
Silicon Surfaces ◽  
Native Oxide ◽  
Native Oxide Layer ◽  
Si Substrates ◽  
Oxide Etching

ABSTRACTWe employed in situ ellipsometry in the monitoring of surface damage to monocrystalline silicon (Si) substrates under hydrogen plasma conditions. These measurements were complemented with spectroscopic ellipsometry and Raman spectroscopy, in order to characterize the surface conditions. It was found that heating the Si substrate to 700°C in the presence of molecular hydrogen produces etching of the native oxide layer, which is typically 10 Å thick. When the already hot and bare silicon surface is submitted to hydrogen plasma, it deteriorates very fast, becoming rough and full of voids. Modeling of the spectroscopic ellipsometry data was used to obtain a quantitative physical picture of the surface damage, in terms of roughness layer t ickness and void fraction. The results indicate that by the time a thin film starts to grow on these silicon surfaces, like in the chemical vapor deposition of diamond, the roughness produced by the hydrogen plasma has already determined to a large extent the rough nature of the film to be grown.

In Situ Control of Native Oxide Growth for Semiconductor Processes

1992 ◽  
Vol 259 ◽  
Author(s):  
Mizuho Morita ◽  
Tadahiro Ohmi
Keyword(s):  
Film Formation ◽  
Molecular Layer ◽  
Chemical Vapor ◽  
Native Oxide ◽  
Molecular Flow ◽  
Oxide Growth ◽  
Temperature Ramp ◽  
In Situ Control ◽  
Si Films

ABSTRACTIn situ control methods of native oxide growth on Si surfaces at room temperature and during the temperature ramp-up are proposed for metal/Si contact formation, lowtemperature Si epitaxy, and very-thin thermal oxide film formation, based on analyses of factors dominating the oxide growth. Low-resistance W/Si contacts are formed by N2 gas sealed processing of HF cleaning right before W chemical vapor deposition(CVD). Highquality epitaxial Si films are grown at a low temperature of 550°C using Si2H6 molecular flow pre-showering to suppress the oxide growth caused by water or oxygen in a CVD reactor. Very thin gate oxide films with high insulating performance are realized by the preoxidation step at 300°C to form one-molecular-layer oxide for passivation and by the subsequent temperature ramp-up step in ultraclean Ar gas to prevent oxide growth and an increase of surface microroughness before the thermal oxidation step.

In Situ Diagnostics of Vuv Laser Cvd of Semiconductor Interfaces by Ftir Spectroscopy and Spectroscopic Ellipsometry

1995 ◽  
Vol 397 ◽  
Author(s):  
M. Barth ◽  
J. Knobloch ◽  
P. Hess
Keyword(s):  
Film Thickness ◽  
Bulk Material ◽  
Substrate Surface ◽  
Cluster Formation ◽  
Interface Layer ◽  
Native Oxide ◽  
Initial Growth ◽  
Difference Spectra ◽  
Si Substrates

ABSTRACTThe growth of high quality amorphous hydrogenated semiconductor films was explored with different in situ spectroscopic methods. Nucleation of ArF laser-induced CVD of a-Ge:H on different substrates was investigated by real time ellipsometry, whereas the F2 laser (157nm) deposition of a-Si:H was monitored by FTIR transmission spectroscopy. The ellipsometric studies reveal a significant influence of the substrate surface on the nucleation stage, which in fact determines the electronic and mechanical properties of the bulk material. Coalescence of initial clusters occurs at a thickness of 16 Å for atomically smooth hydrogen-terminated c-Si substrates, whereas on native oxide covered c-Si substrates the bulk volume void fractions are not reached until 35 Å film thickness. For the first time we present a series of IR transmission spectra with monolayer resolution of the initial growth of a-Si:H. Hereby the film thickness was measured simultaneously using a quartz crystal microbalance with corresponding sensitivity. The results give evidence for cluster formation with a coalescence radius of about 20 Å. Difference spectra calculated for layers at different depths with definite thickness reveal that the hydrogen-rich interface layer stays at the substrate surface and does not move with the surface of the growing film. The decrease of the Urbach energy switching from native oxide to H-terminated substrates suggests a strong influence of the interface morphology on the bulk material quality.

Role of grain boundaries in the epitaxial realignment of undoped and As-doped polycrystalline silicon films

1993 ◽  
Vol 8 (10) ◽  
pp. 2608-2612 ◽  
Author(s):  
C. Spinella ◽  
F. Benyaïch ◽  
A. Cacciato ◽  
E. Rimini ◽  
G. Fallico ◽  
...  
Keyword(s):  
Heat Treatment ◽  
Grain Structure ◽  
Native Oxide ◽  
Thermally Induced ◽  
Si Substrates ◽  
As Doping ◽  
Fine Grain ◽  
Si Films ◽  
Polycrystalline Silicon Films ◽  
Reduced Density

The early stages of the thermally induced epitaxial realignment of undoped and As-doped polycrystalline Si films deposited onto crystalline Si substrates were monitored by transmission electron microscopy. Under the effect of the heat treatment, the native oxide film at the poly-Si/c-Si interface begins to agglomerate into spherical beads. The grain boundary terminations at the interface are the preferred sites for the triggering of the realignment transformation which starts by the formation of epitaxial protuberances at these sites. This feature, in conjunction with the microstructure of the films during the first instants of the heat treatment, explains the occurrence of two different realignment modes. In undoped films the epitaxial protuberances, due to the fine grain structure, are closely distributed and grow together forming a rough interface moving toward the film's surface. For As-doped films, the larger grain size leaves a reduced density of realignment sites. Due to As doping some of these sites grow fast and form epitaxial columns that further grow laterally at the expense of the surrounding polycrystalline grains.

Polycrystalline Silicon Gettering Layers with Controlled Residual Stress

2013 ◽  
Vol 205-206 ◽  
pp. 284-289 ◽  
Author(s):  
David Lysáček ◽  
Petr Kostelník ◽  
Petr Pánek
Keyword(s):  
Residual Stress ◽  
Vapor Deposition ◽  
Polycrystalline Silicon ◽  
Opposite Sign ◽  
Chemical Vapor ◽  
Pressure Chemical ◽  
Novel Method ◽  
The Individual ◽  
Scanning Electron

We report on a novel method of low pressure chemical vapor deposition of polycrystalline silicon layers used for external gettering in silicon substrate for semiconductor applications. The proposed method allowed us to produce layers of polycrystalline silicon with pre-determined residual stress. The method is based on the deposition of a multilayer system formed by two layers. The first layer is intentionally designed to have tensile stress while the second layer has compressive stress. Opposite sign of the residual stresses of the individual layers enables to pre-determine the residual stress of the gettering stack. We used scanning electron microscopy for structural characterization of the layers and intentional contamination for demonstration of the gettering properties. Residual stress of the layers was calculated from the wafer curvature.

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