Process Improvements for Reductions in Total Charge and Interface Trap Densities of Thermally-Grown Sub-3.5nm-Thick Silicon Nitrides

1999 ◽  
Vol 592 ◽  
Author(s):  
Sanjit Singh Dang ◽  
Christos G. Takoudis

ABSTRACTUltra-thin silicon nitride films are being studied for use as high-dielectric constant (highk) materials in future gate dielectric applications, as Complementary Metal-Oxide-Semiconductor (CMOS) transistors are scaled down to the sub-100nm regime. In this study, process modifications are proposed to reduce the total charge and interface trap densities in sub-3.5 nm-thick silicon nitride films, grown in NH3, in a conventional furnace at 900°C and 1 atm. It is shown that by employing a short (<1 min) oxynitridation step in NO, before nitridation, and oxynitridation/Ar-annealing steps, after nitridation, silicon nitride films can be thermally grown with a total charge density as low as about 2.5E10 q/cm2 and an interface trap density of about 2.1E11/(eV-cm2). Besides, the effect of using NO as opposed to N2O for oxynitridation steps is also discussed.

MRS Bulletin ◽  
2002 ◽  
Vol 27 (3) ◽  
pp. 217-221 ◽  
Author(s):  
John Robertson

AbstractIdentifying candidate materials to replace SiO2 as the gate dielectric for complementary metal oxide semiconductor (CMOS) applications is a difficult task. Proper assessment of the critical materials requirements is essential, and it is important to devise an approach to predict materials properties without having to make many unnecessary measurements on high-ĸ materials. Such an approach helps to eliminate unlikely candidates and focus on the most promising ones. Clearly, this type of modeling approach requires an understanding of several physical and chemical characteristics, including the bonding and electronic structure, band alignment with Si, and the nature of the dielectric constant and interface properties. We present a critical assessment of some existing methods and models of materials properties, as well as a comparison of the present modeling approach with some experimentally determined values.


2013 ◽  
Vol 22 ◽  
pp. 564-569
Author(s):  
KANTA RATHEE ◽  
B. P. MALIK

Down scaling of complementary metal oxide semiconductor transistors has put limitations on silicon dioxide to be used as an effective dielectric. It is necessary to replace the SiO 2 with a physically thicker layer of oxides of high dielectric constant. Thus high k dielectrics are used to suppress the existing challenges for CMOS scaling. Many new oxides are being evaluated as gate dielectrics such as Ta2O5 , HfO2 , ZrO2 , La2O3 , HfO2 , TiO2 , Al2O3 , Y2O3 etc but it was soon found that these oxides in many respects have inferior electronic properties to SiO2 . But the the choice alone of suitable metal oxide with high dielectric constant is not sufficient to overcome the scaling challenges. The various deposition techniques and the conditions under which the thin films are deposited plays important role in deciding the structural and electrical properties of the deposited films. This paper discusses in brief the various deposition conditions which are employed to improve the structural and electrical properties of the deposited films.


2019 ◽  
Vol 9 (2) ◽  
pp. 255 ◽  
Author(s):  
Quentin Wilmart ◽  
Houssein El Dirani ◽  
Nicola Tyler ◽  
Daivid Fowler ◽  
Stéphane Malhouitre ◽  
...  

Silicon photonics is one of the most prominent technology platforms for integrated photonics and can support a wide variety of applications. As we move towards a mature industrial core technology, we present the integration of silicon nitride (SiN) material to extend the capabilities of our silicon photonics platform. Depending on the application being targeted, we have developed several integration strategies for the incorporation of SiN. We present these processes, as well as key components for dedicated applications. In particular, we present the use of SiN for athermal multiplexing in optical transceivers for datacom applications, the nonlinear generation of frequency combs in SiN micro-resonators for ultra-high data rate transmission, spectroscopy or metrology applications and the use of SiN to realize optical phased arrays in the 800–1000 nm wavelength range for Light Detection And Ranging (LIDAR) applications. These functionalities are demonstrated using a 200 mm complementary metal-oxide-semiconductor (CMOS)-compatible pilot line, showing the versatility and scalability of the Si-SiN platform.


1978 ◽  
Vol 32 (5) ◽  
pp. 330-331 ◽  
Author(s):  
Takashi Ito ◽  
Takao Nozaki ◽  
Hideki Arakawa ◽  
Masaichi Shinoda

MRS Bulletin ◽  
2002 ◽  
Vol 27 (3) ◽  
pp. 222-225 ◽  
Author(s):  
R. Degraeve ◽  
E. Cartier ◽  
T. Kauerauf ◽  
R. Carter ◽  
L. Pantisano ◽  
...  

AbstractThe continual scaling of complementary metal oxide semiconductor (CMOS) technologies has pushed the Si-SiO2 system to its very limits and has led to the consideration of a number of alternative high-ĸ gate dielectric materials. In the end, it will be the electrical properties of the new Si/high-ĸ system that will determine its usefulness in future CMOS generations. For this reason, the study of the electrical properties of high-ĸ gate insulators is crucial. We present an overview of some of the electrical characterization techniques and reliability tests used to evaluate possible high-ĸ gate materials. Most of these techniques are well known from the characterization of SiO2 layers, but there are some additional complications, such as the presence of several different layers within one gate stack or the use of different gate electrode materials. These make the interpretation and comparison of experimental results more troublesome.


Sign in / Sign up

Export Citation Format

Share Document