Flat-band Voltage Shift of MOS Capacitors with Tantalum Nitride Gate Electrodes Induced by Post Metallization Annealing

2003 ◽  
Vol 786 ◽  
Author(s):  
M. Kadoshima ◽  
K. Yamamoto ◽  
H. Fujiwara ◽  
K. Akiyama ◽  
K. Tominaga ◽  
...  

ABSTRACTWe have investigated the flat-band voltage (VFB) shifts of tantalum nitride gate MOS capacitors prepared by two methods. One is CVD-tantalum nitride (CVD-TaN) deposited by the chemical vapor deposition technique using Ta[NC(CH3)2C2H5][N(CH3)2]3 as a precursor, and the other one is sputtered tantalum nitride (sp-TaN) electrodes deposited by reactive DC magnetron sputtering. In the case of the CVD-TaN electrodes, the effective work function estimated from the relationship between VFB and the equivalent oxide thickness (EOT) of the MOS capacitors was about 4.4eV after post metallization annealing (PMA) at 400°C, and shifted to the mid-gap after PMA at 950°C. Moreover, the VFB values of MOS capacitors with sp-TaN electrodes also showed the same behavior after PMA. This shift is mainly dependent on the PMA temperature, regardless of the deposition method used. Similar VFB shifts induced by PMA were also observed in sp-TaN/ Al2O3/ SiO2/ p-Si and sp-TaN/ TaOx/ SiO2/ p-Si capacitors. However, in the case of the sp-TaN/ TaOx/ SiO2/ p-Si capacitors, the VFB shift was also observed when the PDA temperature after the TaOx deposition was 800°C and the PMA temperature after the TaN deposition was only 400°C. These results strongly suggest that this VFB shift caused by the PMA originates from a thin interfacial oxide layer between the TaN gate electrode and the dielectrics. Therefore, the maximum processing temperature after gate electrode deposition is important in order to control the threshold voltage of tantalum nitride gate MOSFETs.

2006 ◽  
Vol 917 ◽  
Author(s):  
Raghunath Singanamalla ◽  
Judit Lisoni ◽  
Isabelle Ferain ◽  
Olivier Richard ◽  
Laure Carbonell ◽  
...  

AbstractThe electrical and material characterization of Ti(C)N deposited by metal organic chemical vapor deposition (MOCVD) technique, as metal gate electrode for advanced CMOS technology is investigated. The effects of the plasma treatment, post anneal treatment and the thickness variation of the Ti(C)N film on the flat band voltage (VFB) and effective work function (WF) of the Poly-Si/Ti(C)N/SiO2 Poly-Si/Ti(C)N/SiO2 gate stack s are reported. We found that both the in-situ plasma treatment and post anneal treatment help in reducing the carbon content (organic) in the film making it more metallic compared to the as-deposited films. However, the post anneal treatment was found to be a better option for getting rid of hydrocarbons as compared to plasma treatment from the gate dielectric integrity point of view. The thickness variation of post annealed Ti(C)N film ranged from 2.5 nm to 10 nm lead to WF shift of upto ~350 mV for both Poly-Si/Ti(C)N/SiO2 and Poly-Si/Ti(C)N/HfO2 gate stacks.


2017 ◽  
Vol 897 ◽  
pp. 167-170
Author(s):  
Hamid Amini Moghadam ◽  
Sima Dimitrijev ◽  
Ji Sheng Han ◽  
Daniel Haasmann

The existence of a turnaround in flat-band voltage shift of stressed MOS capacitors, fabricated on N-type 4H–SiC substrates, is reported in this paper. The turnaround is observed by room-temperature C–V measurements, after two minutes gate-bias stressing of the MOS capacitors at different temperatures. The existence of this turnaround effect demonstrates that a mechanism, in addition to the well-stablished tunneling to the near-interface oxide traps, is involved in the threshold voltage instability of 4H–SiC MOSFETs. This newly identified mechanism occurs due to charge redistribution of the compound polar species that exist in the SiO2–SiC transitional layer.


2008 ◽  
Vol 1073 ◽  
Author(s):  
Christoph Adelmann ◽  
P. Lehnen ◽  
L.-Å. Ragnarsson ◽  
T. Conard ◽  
A. Franquet ◽  
...  

ABSTRACTTaCN-based metal films were grown by metal-organic chemical-vapor deposition (MOCVD) and atomic vapor-deposition (AVD). Thermal decomposition at 500ºC leads to com-positions of approximately Ta0.50C0.4N0.1 (“TaCN”), whereas a reactive process using NH3 leads to the formation of Ta0.65C0.1N0.25 (“Ta2N”) films. All films are nearly amorphous as grown and recrystallize only weakly after spike annealing at 1050°C. The thermal stability of TaCN/HfSiO4 and Ta2N/HfSiO4 stacks during spike annealing at 1050°C was studied and Si and Hf outdiffusion into TaCN or Ta2N was observed. The effective work functions of TaCN and Ta2N on HfSiO4 were found to be as high as 4.9 eV after high thermal budget. It is demonstrated that the effective work function can be further increased to 5.1 eV after high thermal budget by the insertion of a thin Al2O3 capping layer between HfSiO4 and the metal films.


2009 ◽  
Vol 105 (5) ◽  
pp. 053516 ◽  
Author(s):  
C. Adelmann ◽  
J. Meersschaut ◽  
L.-Å. Ragnarsson ◽  
T. Conard ◽  
A. Franquet ◽  
...  

2006 ◽  
Vol 9 (6) ◽  
pp. 975-979 ◽  
Author(s):  
T. Nabatame ◽  
K Segawa ◽  
M. Kadoshima ◽  
H. Takaba ◽  
K. Iwamoto ◽  
...  

2004 ◽  
Vol 830 ◽  
Author(s):  
Seiichi Miyazaki ◽  
Taku Shibaguchi ◽  
Mitsuhisa Ikeda

ABSTRACTWe have studied capacitance-voltage (C-V) and displacement current-voltage characteristics of MOS capacitors with Si nanocrystals embedded in the gate oxide as a floating gate in dark and under visible light illumination at room temperature to gain a better understanding of discrete charged states of the Si-dots floating gate. The Si-dots floating gate with a dot density of 2.8×1011cm-2 and an average dot size of 8nm was fabricated on ∼2.8nm-thick thermally-grown SiO2 as a tunnel oxide by the thermal decomposition of SiH4, and covered with 7.5nm-thick control oxide prepared by thermal oxidation of a-Si. C-V characteristics of Al-gate MOS capacitors on p-type and n-type Si(100) show unique hystereses due to the charging and discharging of the Si-dots floating gate with a symmetric pattern reflecting the Fermi level of the substrate, which enable us to rule out the contribution of traps with a specific energy state to the observed hystereses. For each of high-frequency C-V curves measured in dark, a single capacitance peak appears only around a flat-band voltage condition, which is attributed to the quick flat-band voltage shift caused by the collective emission of charges retaining in the Si-dots floating gate as confirmed from the corresponding displacement current peak. Under visible light illumination, another capacitance peak due to collective charge injection to the electrically neutral Si-dots floating gate becomes observable in the inversion condition governing the on-state of MOS FETs. Thus, the optimum bias conditions for dot-floating gate MOSFETs can be predicted from the capacitor characteristics measured under light illumination.


2005 ◽  
Vol 483-485 ◽  
pp. 693-696 ◽  
Author(s):  
Florin Ciobanu ◽  
Gerhard Pensl ◽  
Valeri V. Afanas'ev ◽  
Adolf Schöner

A surface-near Gaussian nitrogen (N) profile is implanted into n-type 4H-SiC epilayers prior to a standard oxidation process. Depending on the depth of the oxidized layer and on the implanted N concentration, the density of interface states DIT determined in corresponding 4H-SiC MOS capacitors decreases to a minimum value of approx. 1010 cm-2eV-1 in the investigated energy range (EC-(0.1 eV to 0.6 eV)), while the flat-band voltage increases to negative values due to generated fixed positive charges. A thin surface-near layer, which is highly N-doped during the chemical vapour deposition growth, leads to a reduction of DIT only close to the conduction band edge.


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