Numerical Derivative Analysis of Load-Displacement Curves in Depth-Sensing Indentation

2003 ◽  
Vol 791 ◽  
Author(s):  
Tom Juliano ◽  
Vladislav Domnich ◽  
Tom Buchheit ◽  
Yury Gogotsi
Keyword(s):  
Thin Film ◽  
Single Crystal Silicon ◽  
Indentation Load ◽  
Fused Silica ◽  
Depth Sensing ◽  
Crystal Silicon ◽  
Derivative Analysis ◽  
Loading And Unloading ◽  
Load Displacement ◽  
Carbide Derived Carbon

ABSTRACTThe use of load-displacement derivative behavior and power-law curve fitting is applied to find the location of events for a number of different materials during depth-sensing indentation. Load-displacement curves for Berkovich indentations on fused silica, fullerene thin film on sapphire, CdTe thin film on silicon, single crystal silicon, carbide derived carbon, and a polymethylmethacrylate/hydroxyapatite (PMMA/HA) particle composite are examined. The analysis is applied to quantify the location of different events that occur during material loading and unloading.

Thin-Film Transistors in CO2-Laser Crystallized Silicon Films On Fused Silica

1982 ◽  
Vol 13 ◽  
Author(s):  
N. M. Johnson ◽  
H. C. Tuan ◽  
M. D. Moyer ◽  
M. J. Thompson ◽  
D. K. Biegelsen ◽  
...  
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Fused Silica ◽  
Silicon Films ◽  
Silicon On Insulator ◽  
Bulk Glass ◽  
Crystal Silicon ◽  
Glass Substrates

ABSTRACTThin-film transistors (TFT) have been fabricated in scanned CO2 laser-crystallized silicon films on bulk fused silica. In n-channel enhancement-mode transistors, it is demonstrated that an excessively large leakage current can be electric-field modulated with a gate electrode located beneath the silicon layer. This dual-gate configuration provides direct verification on bulk glass substrates of back-channel leakage as has recently been demonstrated for beam-crystallized silicon films on thermal oxides over silicon wafers. With the application of deep-channel ion implantation to suppress back-channel leakage, high-peformance TFTs have been fabricated in single-crystal silicon films on fused silica. The results demonstrate that scanned CO 2 laser processing of silicon films on bulk glass can provide the basis for a silicon-on-insulator technology.

scholarly journals Amorphous thin-film oxide power devices operating beyond bulk single-crystal silicon limit

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Yuki Tsuruma ◽  
Emi Kawashima ◽  
Yoshikazu Nagasaki ◽  
Takashi Sekiya ◽  
Gaku Imamura ◽  
...  
Keyword(s):  
Thin Film ◽  
Single Crystal ◽  
Flexible Substrate ◽  
Single Crystal Silicon ◽  
Bulk Single Crystal ◽  
Next Generation ◽  
Power Devices ◽  
Large Area ◽  
Crystal Silicon ◽  
Amorphous Thin Film

AbstractPower devices (PD) are ubiquitous elements of the modern electronics industry that must satisfy the rigorous and diverse demands for robust power conversion systems that are essential for emerging technologies including Internet of Things (IoT), mobile electronics, and wearable devices. However, conventional PDs based on “bulk” and “single-crystal” semiconductors require high temperature (> 1000 °C) fabrication processing and a thick (typically a few tens to 100 μm) drift layer, thereby preventing their applications to compact devices, where PDs must be fabricated on a heat sensitive and flexible substrate. Here we report next-generation PDs based on “thin-films” of “amorphous” oxide semiconductors with the performance exceeding the silicon limit (a theoretical limit for a PD based on bulk single-crystal silicon). The breakthrough was achieved by the creation of an ideal Schottky interface without Fermi-level pinning at the interface, resulting in low specific on-resistance Ron,sp (< 1 × 10–4 Ω cm2) and high breakdown voltage VBD (~ 100 V). To demonstrate the unprecedented capability of the amorphous thin-film oxide power devices (ATOPs), we successfully fabricated a prototype on a flexible polyimide film, which is not compatible with the fabrication process of bulk single-crystal devices. The ATOP will play a central role in the development of next generation advanced technologies where devices require large area fabrication on flexible substrates and three-dimensional integration.

Measurement of Stress and Strain of Single-Crystal-Silicon Thin Film during On-Chip Tensile Test

1999 ◽  
Vol 119 (2) ◽  
pp. 67-72 ◽  
Author(s):  
Taeko Ando ◽  
Tetsuo Yoshioka ◽  
Mitsuhiro Shikida ◽  
Kazuo Sato ◽  
Tatsuo Kawabata
Keyword(s):  
Thin Film ◽  
Tensile Test ◽  
Single Crystal ◽  
Single Crystal Silicon ◽  
Stress And Strain ◽  
Silicon Thin Film ◽  
Crystal Silicon ◽  
On Chip

Research on the Relationship between Indenter Tip Radius and Hardness with a Self-Designed Nanohardness Test Device

2008 ◽  
Vol 392-394 ◽  
pp. 267-270
Author(s):  
Qiang Liu ◽  
Ying Xue Yao ◽  
L. Zhou
Keyword(s):  
Single Crystal ◽  
Indentation Depth ◽  
Single Crystal Silicon ◽  
Indentation Hardness ◽  
Displacement Curve ◽  
Test Device ◽  
Crystal Silicon ◽  
Load Displacement ◽  
Depth Sensitivity ◽  
Tip Radius

Nanoindentation device has the ability to make the load-displacement measurement with sub-nanometer indentation depth sensitivity, and the nanohardness of the material can be achieved by the load-displacement curve. Aiming at the influence law of indenter tip radius to indentation hardness, testing on the hardness of single-crystal silicon were carried out with the new self-designed nanohardness test device based on nanoindentation technique. Two kinds of Berkovich indenter with radius 40nm and 60nm separately were used in this experiment. According to the load-depth curve, the hardness of single-crystal silicon was achieved by Oliver-Pharr method. Experimental results are presented which show that indenter tip radius do influence the hardness, the hardness value increases and the indentation size effect (ISE) becomes obvious with the increasing of tip radius under same indentation depth.

scholarly journals Amorphous thin-film oxide power devices operating beyond bulk single-crystal silicon limit

2021 ◽  
Author(s):  
Yuki Tsuruma ◽  
Emi Kawashima ◽  
Yoshikazu Nagasaki ◽  
Takashi Sekiya ◽  
Gaku Imamura ◽  
...  
Keyword(s):  
Thin Film ◽  
Single Crystal ◽  
Flexible Substrate ◽  
Single Crystal Silicon ◽  
Bulk Single Crystal ◽  
Next Generation ◽  
Power Devices ◽  
Large Area ◽  
Crystal Silicon ◽  
Amorphous Thin Film

Abstract Power devices (PD) are ubiquitous elements of the modern electronics industry that must satisfy the rigorous and diverse demands for robust power conversion systems that are essential for emerging technologies including Internet of Things (IoT), mobile electronics, and wearable devices. However, conventional PDs based on “bulk” and “single-crystal” semiconductors require high temperature (>1000°C) fabrication processing and a thick (typically a few tens to 100 μm) drift layer1, thereby preventing their applications to compact devices2, where PDs must be fabricated on a heat sensitive and flexible substrate. Here we report next-generation PDs based on “thin-films” of “amorphous” oxide semiconductors with the performance exceeding the silicon limit (a theoretical limit for a PD based on bulk single-crystal silicon3). The breakthrough was achieved by the creation of an ideal Schottky interface without Fermi-level pinning at the interface, resulting in low specific on-resistance Ron,sp (<1×10-4 Ωcm2) and high breakdown voltage VBD (~100 V). To demonstrate the unprecedented capability of the amorphous thin-film oxide power devices (ATOPs), we successfully fabricated a prototype on a flexible polyimide film, which is not compatible with the fabrication process of bulk single-crystal devices. The ATOP will play a central role in the development of next generation advanced technologies where devices require large area fabrication on flexible substrates and three-dimensional integration.

High-speed strained-single-crystal-silicon thin-film transistors on flexible polymers

2006 ◽  
Vol 100 (1) ◽  
pp. 013708 ◽  
Author(s):  
Hao-Chih Yuan ◽  
Zhenqiang Ma ◽  
Michelle M. Roberts ◽  
Donald E. Savage ◽  
Max G. Lagally
Keyword(s):  
Thin Film ◽  
Single Crystal ◽  
Thin Film Transistors ◽  
High Speed ◽  
Single Crystal Silicon ◽  
Flexible Polymers ◽  
Silicon Thin Film ◽  
Crystal Silicon

Three Generations of Solar Cells

2021 ◽  
Vol 1165 ◽  
pp. 113-130
Author(s):  
Romyani Goswami
Keyword(s):  
Thin Film ◽  
Solar Cells ◽  
Solar Cell ◽  
Single Crystal ◽  
Amorphous Silicon ◽  
Cost Reduction ◽  
High Stability ◽  
Single Crystal Silicon ◽  
Nanocrystalline Silicon ◽  
Crystal Silicon

In photovoltaic system the major challenge is the cost reduction of the solar cell module to compete with those of conventional energy sources. Evolution of solar photovoltaic comprises of several generations through the last sixty years. The first generation solar cells were based on single crystal silicon and bulk polycrystalline Si wafers. The single crystal silicon solar cell has high material cost and the fabrication also requires very high energy. The second generation solar cells were based on thin film fabrication technology. Due to low temperature manufacturing process and less material requirement, remarkable cost reduction was achieved in these solar cells. Among all the thin film technologies amorphous silicon thin film solar cell is in most advanced stage of development and is commercially available. However, an inherent problem of light induced degradation in amorphous silicon hinders the higher efficiency in this kind of cell. The third generation silicon solar cells are based on nano-crystalline and nano-porous materials. Hydrogenated nanocrystalline silicon (nc-Si:H) is becoming a promising material as an absorber layer of solar cell due to its high stability with high Voc. It is also suggested that the cause of high stability and less degradation of certain nc-Si:H films may be due to the improvement of medium range order (MRO) of the films. During the last ten years, organic, polymer, dye sensitized and perovskites materials are also attract much attention of the photovoltaic researchers as the low budget next generation PV material worldwide. Although most important challenge for those organic solar cells in practical applications is the stability issue. In this work nc-Si:H films are successfully deposited at a high deposition rate using a high pressure and a high power by Radio Frequency Plasma Enhanced Chemical Vapor Deposition (RF PECVD) technique. The transmission electron microscopy (TEM) studies show the formations of distinct nano-sized grains in the amorphous tissue with sharp crystalline orientations. Light induced degradation of photoconductivity of nc-Si:H materials have been studied. Single junction solar cells and solar module were successfully fabricated using nanocrystalline silicon as absorber layer. The optimum cell is 7.1 % efficient initially. Improvement in efficiency can be achieved by optimizing the doped layer/interface and using Ag back contact.

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