scholarly journals Design and Optimization of a Direct-Conversion Double-Balanced Mixer for RF Receiver Front-End

Author(s):  
Frederick Ray Gomez

Differential implementation is becoming highly favoured in RFIC (radio frequency integrated circuit) design, notably its high immunity to common-mode noises, acceptable rejection of parasitic coupling, and increased dynamic range. One specific RF front-end building block that is usually designed as a differential circuit is the mixer.  This technical paper presents a study of a differential mixer, notably the double-balanced mixer implemented on a direct-conversion architecture in a standard 90nm CMOS (complementary metal-oxide semiconductor) process.  Operating frequency is set at 5GHz, which is a typical frequency for RF (radio frequency) receiver.   Impedance matching was essential to fully optimize the mixer design.  The direct-conversion double-balance mixer design eventually achieved conversion gain of 11.463dB and noise figure of 16.529dB, comparable to mixer designs from past research and studies.

Author(s):  
Frederick Ray I. Gomez

Differential implementation is becoming highly popular in Radio Frequency Integrated Circuit (RFIC) design, notably for its high immunity to common-mode noises, acceptable rejection of parasitic coupling, and increased dynamic range. One RF front-end building block that is usually designed as a differential circuit is the mixer. This paper presents a design, study, and optimization of a differential mixer, more specifically the Gilbert-cell mixer (also known as double-balanced mixer) implemented on a direct-conversion architecture in a standard 90 nm Complementary Metal-Oxide Semiconductor (CMOS) process. Operating frequency is set to 5GHz, which is a typical frequency for Worldwide Interoperability for Microwave Access (WiMAX) receiver. Impedance matching was necessary to design and fully optimize the mixer design. The direct-conversion Gilbert-cell mixer design ultimately achieved conversion gain of 11.463dB and noise figure of 16.529dB, comparable to mixer designs from past research and studies.


2013 ◽  
Vol 5 (3) ◽  
pp. 329-334 ◽  
Author(s):  
Udo Karthaus ◽  
Stephan Ahles ◽  
Ahmed Elmaghraby ◽  
Horst Wagner

This paper presents a radio frequency (RF) continuous-time band-pass delta sigma modulator (CT BP DSM) receiver realized in a 180 nm SiGe BiCMOS technology. It also provides an introduction to active antenna systems (AAS) for cellular infrastructure base stations, which is the target application for this RF integrated circuit (IC). The internal quantizer and feedback digital to analog converter (DAC) resolution of the CT BP DSM is 2 bit. Without applying DAC linearization techniques such as trimming or dynamic element matching being utilized, measured performance parameters include an SNR and SNDR in 35 MHz bandwidth of 56.7 and 53.7 dB, respectively. IIP3 and noise figure are −6.6 dBm and 10 dB, respectively. No image reception is noticeable within a measurement dynamic range of 83 dB. When driven by single-carrier and three-carrier W-CDMA signals, adjacent channel leakage ratio (ACLR) is −62.6 and −52.1 dB, respectively, making the design also suitable as a modulator for a class-S power amplifier.


Author(s):  
Tran Van Hoi ◽  
Ngo Thi Lanh ◽  
Nguyen Xuan Truong ◽  
Nguyen Huu Duc ◽  
Bach Gia Duong

<p>This paper focuses on the design and implementation of a front-end for a Vinasat satellite receiver with auto-searching mechanism and auto-tracking satellite. The front-end consists of a C-band low-noise block down-converter and a L-band receiver. The receiver is designed to meet the requirements about wide-band, high sensitivity, large dynamic range, low noise figure. To reduce noise figure and increase bandwidth, the C-band low-noise amplifier is designed using T-type of matching network with negative feedback and the L-band LNA is designed using cascoded techniques. The local oscillator uses a voltage controlled oscillator combine phase locked loop to reduce the phase noise and select channels. The front-end has successfully been designed and fabricated with parameters: Input frequency is C-band; sensitivity is greater than -130 dBm for C-band receiver and is greater than -110dBm for L-band receiver; output signals are AM/FM demodulation, I/Q demodulation, baseband signals.</p>


2021 ◽  
Author(s):  
Christos Tsokos ◽  
Efstathios Andrianopoulos ◽  
Adam Raptakis ◽  
Nikolaos Lyras ◽  
Lefteris Gounaridis ◽  
...  

<div>We demonstrate a broadband and continuously tunable 1×4 optical beamforming network (OBFN), based on the hybrid integration of indium phosphide (InP) components in the silicon nitride (Si3N4) platform. The photonic integrated circuit (PIC) comprises a hybrid InP-Si3N4 external cavity laser, a pair of InP phase modulators, a Si3N4 optical single-sideband full carrier (SSBFC) filter followed by four tunable optical true time delay lines (OTTDLs), and four InP photodetectors. The performance of the OBFN-PIC is experimentally characterized by measuring the link gain, noise figure, and spurious free dynamic range of the microwave photonics links. Moreover, we assess its beamforming capabilities assuming that the OBFN-PIC is part of a wireless system operating in the downlink direction and feeds a multielement antenna array. Using microwave signals at 5 and 10 GHz with quadrature amplitude modulation (QAM) formats at 500 Mbaud, we evaluate the performance of the OBFN-PIC under various configurations. An error-free performance is achieved for all the experimental cases validating the potential of the proposed OBFN-PIC for high-quality beamforming performance. To our best of knowledge, this is the first thorough performance evaluation of a fully integrated OBFN-PIC.</div>


2012 ◽  
Vol 198-199 ◽  
pp. 1306-1312
Author(s):  
Hong Zhang ◽  
Yuan Liang

This paper addresses the design of a 3.0-8.0GHz direct-conversion receiver front-end chip for ultra-wideband (UWB) WiMedia/MBOA data communication. It comprises a partial noise cancellation broadband low-noise amplifier (LNA) and a linearity enhancement quadrature mixer. The simulation results show that the chip performance achieved the input reflection coefficient better than -11dB along the entire band and a minimum single sideband noise figure (SSB NF) of 6.57dB at IF frequency of baseband. The conversion gain ranges from 24.9dB to 29.5dB while the input third order interception point (IIP3) ranges from 1.5dBm to 8.7dBm. The chip core merely consumes 20mW from 1.2V supply.


2011 ◽  
Vol 3 (2) ◽  
pp. 131-138 ◽  
Author(s):  
Michael Kraemer ◽  
Daniela Dragomirescu ◽  
Robert Plana

The research on the design of receiver front-ends for very high data-rate communication in the 60 GHz band in nanoscale Complementary Metal Oxide Semiconductor (CMOS) technologies is going on for some time now. Although a multitude of 60 GHz front-ends have been published in recent years, they are not consequently optimized for low power consumption. Thus, these front-ends dissipate too much power for battery-powered applications like handheld devices, mobile phones, and wireless sensor networks. This article describes the design of a direct conversion receiver front-end that addresses the issue of power consumption, while at the same time permitting low cost (due to area minimization by the use of spiral inductors). It is implemented in a 65 nm CMOS technology. The realized front-end achieves a record power consumption of only 43 mW including low-noise amplifier (LNA), mixer, a voltage controlled oscillator (VCO), a local oscillator (LO) buffer, and a baseband buffer (without this latter buffer the power consumption is even lower, only 29 mW). Its pad-limited size is 0.55 × 1 mm2. At the same time, the front-end achieves state-of-the-art performance with respect to its other properties: Its maximum measured power conversion gain is 30 dB, the RF and IF bandwidths are 56.5–61.5 and 0–1.5 GHz, respectively, its measured minimum noise figure is 9.2 dB, and its measured IP−1 dB is −36 dBm.


2021 ◽  
Author(s):  
Christos Tsokos ◽  
Efstathios Andrianopoulos ◽  
Adam Raptakis ◽  
Nikolaos Lyras ◽  
Lefteris Gounaridis ◽  
...  

<div>We demonstrate a broadband and continuously tunable 1×4 optical beamforming network (OBFN), based on the hybrid integration of indium phosphide (InP) components in the silicon nitride (Si3N4) platform. The photonic integrated circuit (PIC) comprises a hybrid InP-Si3N4 external cavity laser, a pair of InP phase modulators, a Si3N4 optical single-sideband full carrier (SSBFC) filter followed by four tunable optical true time delay lines (OTTDLs), and four InP photodetectors. The performance of the OBFN-PIC is experimentally characterized by measuring the link gain, noise figure, and spurious free dynamic range of the microwave photonics links. Moreover, we assess its beamforming capabilities assuming that the OBFN-PIC is part of a wireless system operating in the downlink direction and feeds a multielement antenna array. Using microwave signals at 5 and 10 GHz with quadrature amplitude modulation (QAM) formats at 500 Mbaud, we evaluate the performance of the OBFN-PIC under various configurations. An error-free performance is achieved for all the experimental cases validating the potential of the proposed OBFN-PIC for high-quality beamforming performance. To our best of knowledge, this is the first thorough performance evaluation of a fully integrated OBFN-PIC.</div>


Author(s):  
Tran Van Hoi ◽  
Ngo Thi Lanh ◽  
Nguyen Xuan Truong ◽  
Nguyen Huu Duc ◽  
Bach Gia Duong

<p>This paper focuses on the design and implementation of a front-end for a Vinasat satellite receiver with auto-searching mechanism and auto-tracking satellite. The front-end consists of a C-band low-noise block down-converter and a L-band receiver. The receiver is designed to meet the requirements about wide-band, high sensitivity, large dynamic range, low noise figure. To reduce noise figure and increase bandwidth, the C-band low-noise amplifier is designed using T-type of matching network with negative feedback and the L-band LNA is designed using cascoded techniques. The local oscillator uses a voltage controlled oscillator combine phase locked loop to reduce the phase noise and select channels. The front-end has successfully been designed and fabricated with parameters: Input frequency is C-band; sensitivity is greater than -130 dBm for C-band receiver and is greater than -110dBm for L-band receiver; output signals are AM/FM demodulation, I/Q demodulation, baseband signals.</p>


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