Design of a WiMedia/MBOA 0.13μm CMOS Front-End
2012 ◽
Vol 198-199
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pp. 1306-1312
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This paper addresses the design of a 3.0-8.0GHz direct-conversion receiver front-end chip for ultra-wideband (UWB) WiMedia/MBOA data communication. It comprises a partial noise cancellation broadband low-noise amplifier (LNA) and a linearity enhancement quadrature mixer. The simulation results show that the chip performance achieved the input reflection coefficient better than -11dB along the entire band and a minimum single sideband noise figure (SSB NF) of 6.57dB at IF frequency of baseband. The conversion gain ranges from 24.9dB to 29.5dB while the input third order interception point (IIP3) ranges from 1.5dBm to 8.7dBm. The chip core merely consumes 20mW from 1.2V supply.
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2018 ◽
Vol 10
(5-6)
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pp. 717-728
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2019 ◽
Vol 29
(10)
◽
pp. 2050160
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2013 ◽
Vol 5
(4)
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pp. 453-461
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2011 ◽
Vol 130-134
◽
pp. 3272-3275
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