scholarly journals Effect of epitaxial alignment on electron transport from quasi-two-dimensional iron silicide alpha-FeSi-=SUB=-2-=/SUB=- nanocrystals into p-Si(001)

2018 ◽  
Vol 52 (5) ◽  
pp. 523
Author(s):  
I.A. Tarasov ◽  
M.V. Rautskii ◽  
I.A. Yakovlev ◽  
M.N. Volochaev
Keyword(s):  
Electron Transport ◽  
Room Temperature ◽  
Molecular Beam ◽  
Schottky Barrier Height ◽  
Iron Silicide ◽  
Current Voltage Characteristic ◽  
Current Voltage ◽  
Basic Orientation ◽  
Different Temperatures ◽  
A Current

AbstractSelf-assembled growth of α-FeSi_2 nanocrystal ensembles on gold-activated and gold-free Si(001) surface by molecular beam epitaxy is reported. The microstructure and basic orientation relationship (OR) between the silicide nanocrystals and silicon substrate were analysed. The study reveals that utilisation of the gold as catalyst regulates the preferable OR of the nanocrystals with silicon and their habitus. It is shown that electron transport from α-FeSi2 phase into p-Si(001) can be tuned by the formation of (001)—or (111)—textured α-FeSi2 nanocrystals ensembles. A current-voltage characteristic of the structures with different preferable epitaxial alignment (α-FeSi_2(001)/Si(100) and α-FeSi_2(111)/Si(100)) shows good linearity at room temperature. However, it becomes non-linear at different temperatures for different ORs due to different Schottky barrier height governed by a particular epitaxial alignment of the α-FeSi_2/ p -Si interfaces.

Properties of Pt Schottky Contact on Porous In0.27Ga0.73N Thin Film Revealed from I-V Measurements

2014 ◽  
Vol 895 ◽  
pp. 558-563
Author(s):  
Saleh H. Abud ◽  
Zainuriah Hassan ◽  
F.K. Yam ◽  
M.A. Ahmad
Keyword(s):  
Thin Film ◽  
Barrier Height ◽  
Molecular Beam ◽  
Schottky Barrier Height ◽  
Annealing Temperature ◽  
Electrochemical Etching ◽  
Schottky Contact ◽  
Etching Technique ◽  
Current Voltage ◽  
A Current

The electrical properties of a Pt Schottky contact on porous In0.27Ga0.73N/GaN/AlN/Si (111) thin film that was grown via the plasma-assisted molecular beam epitaxy technique were reported. Porous film nanostructure was synthesized using the electrochemical etching technique at a current density of 25 mA/cm2. The formed pores were dissimilar in terms of size and shape. The effects of annealing temperature and applied bias on Schottky contact for porous sample were investigated by current-voltage (IV) measurements in ambient illumination. The barrier height and ideality factor were determined. The Pt Schottky contact exhibits thermal stability during annealing. Schottky barrier height increased when each of the annealing temperature and bias voltage were increased.

Morphology and I-V Characteristics of Electrochemically Deposited Zinc Oxide on Silicon

2021 ◽  
Vol 20 (3) ◽  
pp. 32-36
Author(s):  
Ahmad Bukhairi Md Rashid ◽  
Mastura Shafinaz Zainal Abidin ◽  
Shaharin Fadzli Abd Rahman ◽  
Amirjan Nawabjan
Keyword(s):  
Zinc Oxide ◽  
Electrochemical Deposition ◽  
Dark Current ◽  
Room Temperature ◽  
Volume Ratio ◽  
Deposition Process ◽  
X Ray ◽  
Current Voltage ◽  
Electrochemically Deposited ◽  
A Current

This paper reported on the electrochemical deposition of zinc oxide (ZnO) on p-silicon (p-Si) (100) substrate in the mixture of 0.1 M of zinc chloride (ZnCl2) and potassium chloride (KCl) electrolyte at a volume ratio of 1:1, 3:1 and 5:1 namely Sample A, B and C. The deposition process was done in room temperature with a current density of 10 mA/cm2 for 30 minutes. Prior to the experiment, all samples were treated by RCA cleaning steps. All samples were characterized using scanning electron microscopy (SEM) and energy dispersive X-ray (EDX). The results show that all samples have the same morphology of a flake-like structure with different Zn:O ratio that were 2.81, 2.35 and 2.49 for samples A, B and C. The current-voltage (I-V) characteristic graph was obtained by dark current measurement using Keithley SMU 2400 and the threshold voltage (Vth) values were determined at 2.21 V, 0.85 V and 1.22 V for sample A, B and C respectively which correspond with the Zn:O ratio where the highest value of Zn:O ratio can be found in sample A and the lowest in sample B. Based on these results, it shows that electrochemical deposition technique is capable of being used to deposit the flake-like structure ZnO on semiconductor material to form the p-n junction which behaves like a diode. The value of Vth seems to be depended on the ratio between Zn and O. Higher ratio of Zn and O will cause the higher value of intrinsic carrier concentration and built in potential which will increase the Vth value.

Response of a Manganite-Based Magnetic Tunnel Structure to Microwave Radiation

2012 ◽  
Vol 190 ◽  
pp. 125-128
Author(s):  
Nikita V. Volkov ◽  
M.V. Rautskiy ◽  
E.V. Eremin ◽  
G.S. Patrin ◽  
P.D. Kim ◽  
...  
Keyword(s):  
Tunnel Structure ◽  
Induced Voltage ◽  
Magnetization Dynamics ◽  
Current Voltage Characteristic ◽  
Rectification Effect ◽  
A Value ◽  
Current Voltage ◽  
Spin Polarized ◽  
Voltage Signal ◽  
A Current

We demonstrate that a magnetic tunnel structure irradiated by microwaves can generate a significant voltage signal due to the rectification effect. The measurements were carried out using current-in-plane geometry with a current flowing parallel to the interfaces in the structure. A value of the microwave-induced voltage strongly depends on a bias current and can be driven by a magnetic field. The rectification effect is discussed both in classical terms of nonlinearity of the current-voltage characteristic and using a mechanism that involves the interplay between the spin-polarized current and magnetization dynamics in the magnetic tunnel structure.

Irregular Electron Transport Through a-Si:H Based Potential Barriers

1993 ◽  
Vol 297 ◽  
Author(s):  
Norbert Bernhard ◽  
B. Frank ◽  
B. Movaghar ◽  
G.H. Bauer
Keyword(s):  
Electron Transport ◽  
Transport Mechanism ◽  
Current Transport ◽  
Transport Mechanisms ◽  
Potential Barriers ◽  
Resonant Tunnelling ◽  
Current Voltage ◽  
Different Temperatures ◽  
Current Voltage Characteristics ◽  
Stable Formation

Irregularities in the current-voltage-characteristics of a-Si:H based potential barriers have been investigated experimentally, and are discussed theoretically with respect to different transport mechanisms. The investigated samples were different series of double and single barrier a-Si:H - a-Si1-xCx:H - heterostructures, as well as homogeneous samples without heterostructure barrier. Current-voltage-(I-V)-characteristics showing a wide variety of features, from complete smoothness of the curves, to bumps and even accidental step-like switching behaviour, as well as different forms of noise, were recorded at different temperatures. Resonant tunnelling as an explaining transport mechanism for the anomalies was excluded because of inconsistency between experiment and calculations partially including special amorphous features. Instead it is argued that all observed irregularities, i. e. bumps in I-V-curves, switching-like behaviour, and appearance of noise, are related to current transport via trap-assisted tunnelling through locally strongly confined transport paths, leading to the meta-stable formation, change and break-down of conductory filaments.

Electrical and Structural Properties of Ti Contacts on an Atomically Clean N-Type GaAs Surface

1992 ◽  
Vol 281 ◽  
Author(s):  
X. W. Lin ◽  
Z. Liliental-Weber ◽  
W. Swider ◽  
T. McCants ◽  
N. Newman ◽  
...  
Keyword(s):  
Structural Properties ◽  
Gaas Substrate ◽  
Room Temperature ◽  
Schottky Barrier Height ◽  
High Resolution Electron Microscopy ◽  
Resolution Electron ◽  
Current Voltage ◽  
Higher Temperature ◽  
Amorphous Interlayer

ABSTRACTUsing current-voltage measurements and high-resolution electron microscopy (HREM), we have studied the electrical and structural properties of Ti contacts on an atomically clean n-type GaAs (110) surface. The Ti/n-GaAs diodes are formed at room temperature in ultrahigh vacuum and in situ isochronally (10 min) annealed at temperatures ranging from 200 to 450°C. We find that the Schottky barrier height of the diodes increases by ≈0.10 eV upon annealing at 200°C and remains basically stable for higher-temperature anneals. HREM investigation reveals that Ti reacts with GaAs in its as-deposited state to form an amorphous interlayer ≈1.5 nm thick. After anneals to 450°C, extensive reactions occur at the interface, resulting in the formation of a layered structure Ti/Ga3Ti2/TiAs/GaAs, with TiAs protruding into the GaAs substrate.

The Properties of n-ZnO/p-SiC Heterojunctions and their Potential Applications for Devices

2006 ◽  
Vol 527-529 ◽  
pp. 1571-1574 ◽  
Author(s):  
Cole W. Litton ◽  
Ya.I. Alivov ◽  
D. Johnstone ◽  
Ümit Özgür ◽  
V. Avrutin ◽  
...  
Keyword(s):  
Room Temperature ◽  
Molecular Beam ◽  
Reverse Bias ◽  
Zno Films ◽  
Turn On ◽  
Forward Current ◽  
Current Voltage ◽  
Potential Applications ◽  
Current Voltage Characteristics ◽  
P Type

Heteroepitaxial n-ZnO films have been grown on commercial p-type 6H-SiC substrates by plasma-assisted molecular-beam epitaxy, and n-ZnO/p-SiC heterojunction mesa structures have been fabricated and their photoresponse properties have been studied. Current-voltage characteristics of the structures had a very good rectifying diode-like behavior with a leakage current less than 2 x 10-4 A/cm2 at -10 V, a breakdown voltage greater than 20 V, a forward turn on voltage of ∼5 V, and a forward current of ∼2 A/cm2 at 8 V. Photosensitivity of the diodes, when illuminated from ZnO side, was studied at room temperature and photoresponsivity of as high as 0.045 A/W at -7.5 V reverse bias was observed for photon energies higher than 3.0 eV.

Ion Implanted p+/n Diodes: Post-Implantation Annealing in a Silane Ambient in a Cold-Wall Low-Pressure CVD Reactor

2006 ◽  
Vol 527-529 ◽  
pp. 819-822
Author(s):  
Fabio Bergamini ◽  
Shailaja P. Rao ◽  
Antonella Poggi ◽  
Fabrizio Tamarri ◽  
Stephen E. Saddow ◽  
...  
Keyword(s):  
Room Temperature ◽  
Annealing Temperature ◽  
Low Pressure ◽  
Cold Wall ◽  
Current Voltage Characteristic ◽  
Process Yield ◽  
Annealing Temperatures ◽  
Current Voltage ◽  
Post Implantation

This work reports the realization and characterization of 4H-SiC p+/n diodes with the p+ anodes made by Al+ ion implantation at 400°C and post-implantation annealing in silane ambient in a cold-wall low-pressure CVD reactor. The Al depth profile was almost box shaped with a height of 6×1019 cm-3 and a depth of 160 nm. Implant anneals were performed in the temperature range from 1600°C to 1700°C. As the annealing temperature was increased, the silane flow rate was also increased. This annealing process yields a smooth surface with a roughness of the implanted area of 1.7 - 5.3 nm with increasing annealing temperature. The resistivity of the implanted layer, measured at room temperature, decreased for increasing annealing temperatures with a minimum value of 1.4 0-cm measured for the sample annealed at 1700°C. Considering only the current-voltage characteristic of a diode that could be modeled as an abrupt p/n junction within the frame of the Shockley theory, the diode process yield and the diode leakage current decreased, respectively, from 93% to 47% and from 2×10-7 Acm-2 to 1×10-8 Acm-2 at 100 V reverse bias, for increasing post implantation annealing temperature.

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