Power Efficient Implementation of Low Noise CMOS LC VCO using 32nm Technology for RF Applications

Author(s):  
Shitesh Tiwari ◽  
Sumant Katiyal ◽  
Parag Parandkar

Voltage Controlled Oscillator (VCO) is an integral component of most of the receivers such as GSM, GPS etc. As name indicates, oscillation is controlled by varying the voltage at the capacitor of LC tank. By varying the voltage, VCO can generate variable frequency of oscillation. Different VCO Parameters are contrasted on the basis of phase noise, tuning range, power consumption and FOM. Out of these phase noise is dependent on quality factor, power consumption, oscillation frequency and current. So, design of LC VCO at low power, low phase noise can be obtained with low bias current at low voltage.  Nanosize transistors are also contributes towards low phase noise. This paper demonstrates the design of low phase noise LC VCO with 4.89 GHz tuning range from 7.33-11.22 GHz with center frequency at 7 GHz. The design uses 32nm technology with tuning voltage of 0-1.2 V. A very effective Phase noise of -114 dBc / Hz is obtained with FOM of -181 dBc/Hz. The proposed work has been compared with five peer LC VCO designs working at higher feature sizes and outcome of this performance comparison dictates that the proposed work working at better 32 nm technology outperformed amongst others in terms of achieving low Tuning voltage and moderate FoM, overshadowed by a little expense of power dissipation. 

Author(s):  
AJIT SAMASGIKAR

A low phase noise, power efficient VCO using UMC 0.18μm CMOS technology has been proposed in this paper. The proposed VCO has a tuning range of 9.71GHz to 9.9GHz, with a phase noise of -79.88 dBc/Hz @ 600kHz offset. The Vtune ranging between 1V - 1.5V generates sustained oscillations. The maximum power consumption of the VCO is 11.9mW using a supply voltage of 1.8V with ±10% variation.


2017 ◽  
Vol 26 (11) ◽  
pp. 1750184 ◽  
Author(s):  
Qiuzhen Wan ◽  
Jun Dong ◽  
Hui Zhou ◽  
Fei Yu

In this paper, a very low power modified current-reused quadrature voltage-controlled oscillator (QVCO) is proposed with the back-gate coupling technique for the quadrature signal generation. By stacking switching transistors in series like a cascode, the modified current-reused QVCO can be constructed in a totem-pole manner to reuse the dc biasing current and lower the power consumption. By utilizing the back-gates of switching transistors as coupling terminals to achieve the quadrature outputs, the back-gate coupled QVCO improves the phase noise and reduces the power consumption compared to the conventional coupling transistor based topology. Together with the modified current-reuse and back-gate coupling techniques, the proposed QVCO can operate at reduced supply voltage and power consumption while maintaining remarkable circuit performance in terms of low phase noise and wide tuning range. With a dc power of 1.6[Formula: see text]mW under a 0.8[Formula: see text]V supply voltage, the simulation results show the tuning range of the QVCO is from 2.36 to 3.04[Formula: see text]GHz as the tuning voltage is varied from 0.8 to 0.0[Formula: see text]V. The phase noise is [Formula: see text]118.3[Formula: see text]dBc/Hz at 1[Formula: see text]MHz offset frequency from the carrier frequency of 2.36[Formula: see text]GHz and the corresponding figure-of-merit of the QVCO is [Formula: see text]183.7[Formula: see text]dBc/Hz.


2021 ◽  
Author(s):  
Mahin Esmaeilzadeh ◽  
Yves Audet ◽  
Mohamed Ali ◽  
Mohamad Sawan

<p>We describe in the paper a ring voltage-controlled oscillator (VCO) indicating an improved phase noise over a wide range of frequency offsets and an extended frequency/voltage tuning range. The phase noise is improved by leveraging a better linearity approach, while reducing the VCO gain and maintaining wide tuning range. The proposed VCO is a block of a time-domain comparator embedded in a monitoring and readout circuit of an industrial sensor interface. An analytical model is extracted resulting in closed-form expressions for both input-referred noise and phase noise of the VCO. Employing the analytical expressions, the contributed noise and phase noise limitations are fully addressed, and all the effective factors are investigated. The prototype of the proposed VCO was implemented and fabricated in a 0.35 µm CMOS process. The integrated VCO consumes 0.903 mW from a 3.3 V supply, when running at its maximum frequency of 9.37 MHz. The measured phase noise of the proposed VCO is -147.57 dBc/Hz at 1 MHz offset from the 9.37 MHz oscillation frequency, and the occupied silicon area of circuit is 0.005 mm<sup>2</sup>.</p>


2012 ◽  
Vol 21 (04) ◽  
pp. 1250033 ◽  
Author(s):  
FATEMEH ATAEI ◽  
MOHAMMAD YAVARI

In this paper, a new class-C voltage-controlled oscillator (VCO) is presented. In the proposed VCO, the tail capacitor of the conventional class-C oscillator is dislocated from the source of the cross-coupled transistors to their gate to achieve a rail-to-rail output swing. This improves the phase noise by 2.9 dB compared to the conventional class-C one. Besides, a new switching scheme is presented in the switched capacitor bank used for coarse tuning of the proposed VCO to lower the on resistance of the switches as well as to reduce the parasitic capacitors. This wide tuning range class-C VCO is designed in a 0.18 μm CMOS technology. It achieves a -125.3 dBc/Hz phase noise at 1 MHz offset from a 2.2 GHz carrier frequency while covering a wide tuning range from 1.82 to 2.65 GHz and consuming 3.5 mW power from a single 0.9 V power supply.


Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 935 ◽  
Author(s):  
Arash Hejazi ◽  
YoungGun Pu ◽  
Kang-Yoon Lee

This paper presents a wide-range and low phase noise mm-Wave Voltage Controlled Oscillator (VCO) based on the transconductance linearization technique. The proposed technique eliminates the deep triode region of the active part of the VCO, and lowers the noise introduced by the gm-cell. The switch sizes inside the switched capacitor bank of the VCO are optimized to minimize the resistance of the switches while keeping the wide tuning range. A new layout technique shortens the routing of the VCO outputs, and lowers the parasitic inductance and resistance of the VCO routing. The presented method prevents the reduction of the quality factor of the tank due to the long routing. The proposed VCO achieves a discrete frequency tuning range, of 14 GHz to 18 GHz, through a linear coarse and middle switched capacitor array, and offers superior phase noise performance compared to recent state-of-the-art VCO architectures. The design is implemented in a 45 nm CMOS process and occupies a layout area (including output buffers) of 0.14 mm2. The power consumption of the VCO core is 24 mW from the power supply of 0.8 V. The post-layout simulation result shows the VCO achieves the phase noise performances of −87.2 dBc/Hz and −113 dBc/Hz, at 100 kHz and 1 MHz offset frequencies from the carrier frequency of 14 GHz, respectively. In an 18 GHz carrier frequency, the results are −87.4 dBc/Hz and −110 dBc/Hz, accordingly.


Sign in / Sign up

Export Citation Format

Share Document