scholarly journals Study of Passive CMOS Mixers Effects on Image Rejection Ratio

Author(s):  
Jorge Morte ◽  
Antonio D. Martínez Pérez ◽  
Francisco Aznar ◽  
Carlos Sánchez-Azqueta ◽  
Santiago Celma

In this brief, modeling and simulation of quadrature passive mixers are analyzed, focusing on the impact they have on the image rejection ratio (IRR). For this purpose, a 65-nm CMOS technology is used.

Electronics ◽  
2021 ◽  
Vol 10 (9) ◽  
pp. 1105
Author(s):  
Antonio D. Martinez-Perez ◽  
Francisco Aznar ◽  
Guillermo Royo ◽  
Santiago Celma

In the current state of the art, WiFi-alike standards require achieving a high Image Rejection Ratio (IRR) while having low power consumption. Thus, quadrature structures based on passive ring mixers offer an attractive and widely used solution, as they can achieve a high IRR while being a passive block. However, it is not easy for the designer to know when a simple quadrature scheme is enough and when they should aim for a double quadrature structure approach, as the latter can improve the performance at the cost of requiring more area and complexity. This study focuses on the IRR, which crucially depends on the symmetry between the I and Q branches. Non-idealities (component mismatches, parasitics, etc.) will degrade the ideal balance by affecting the mixer and/or following/previous stages. This paper analyses the effect of imbalances, providing the constraints for obtaining a 40 dB IRR in the case of a conversion from a one-hundred-megahertz signal to the five-gigahertz range (upconversion) and vice versa (downconversion) for simple and double quadrature schemes. All simulations were carried out with complete device models from 65 nm standard CMOS technology and also a post-layout Monte Carlo analysis was included for mismatch analysis. The final section includes guidelines to help designers choose the most adequate scheme for each case.


2020 ◽  
Vol 38 ◽  
pp. 192-205
Author(s):  
Minh Tri Tran ◽  
Nene Kushita ◽  
Anna Kuwana ◽  
Haruo Kobayashi

This paper proposes a method to design a flat pass-band gain with two RC band-stop filters for a 4-stage passive RC polyphase filter in a Bluetooth receiver. Based on the superposition principle, the transfer function of the poplyphase filter is derived. However, the pass-band gain of this filter is not flat on the positive frequency domain. There are two local maximum values when the input signals are the wanted signals. Therefore, two RC band-stop filters are used to improve the pass-band gain of these local maximum values. As a result, a flat pass-band gain passive RC poly-phase filter is designed for a Bluetooth low-IF receiver which image rejection ratio is-36dB, and ripple gain is 0.47dB.


2013 ◽  
Vol 49 (1) ◽  
pp. 18-20 ◽  
Author(s):  
J. Wang ◽  
L. Ye ◽  
L. Chen ◽  
J. Liu ◽  
H. Liao

VLSI Design ◽  
2007 ◽  
Vol 2007 ◽  
pp. 1-13 ◽  
Author(s):  
Jianhong Xiao ◽  
Guang Zhang ◽  
Tianwei Li ◽  
Jose Silva-Martinez

A low-cost low-power DTV tuner for current digital television application is described. In order to increase integration level and reduce power consumption for off-air DTV tuner application, an SAW-filterless tuner front-end architecture is adopted. As a part of the concept, key building blocks for this architecture are implemented on a main stream 0.35 μm CMOS technology. Experimental measurements for the prototype chip validate the system architecture; the prototype consumes 300 mw and achieves 45 dB of image rejection ratio within the entire 750 MHz frequency band.


Author(s):  
Subramaniam Shankar ◽  
Prabir Saha ◽  
Duane C. Howard ◽  
Ryan Diestelhorst ◽  
Troy D. England ◽  
...  

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