scholarly journals PELATIHAN PEMBUATAN LAYOUT PCB DENGAN DIP TRACE DAN DRY FILM PHOTORESIST BAGI SMK MUHAMMADIYAH 2 SALAM MAGELANG

2018 ◽  
Vol 1 (1) ◽  
pp. 13
Author(s):  
Denny Dermawan
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Short Term ◽  
Work Related ◽  
Short Course ◽  
Photoresist Film ◽  
Near Term ◽  
Dry Film ◽  
Final Work ◽  
Dry Film Photoresist

The desire of students of SMK Muhammadiyah 2 Salam Magelang to be able to make a printed circuit board is something that is very important to be welcomed and followed up wisely so that the desire of the students is not just a wishful dream but will be a reality. This activity is meant to be an effort not only to overcome difficulties at certain times (short-term activities), but is expected to be sustainable for the future (longer term). Looking at the fact, of course, should be strived to realize the handling of the problem at least for the near term. For that required activities that are practical and immediate benefits can be taken as the activity can be a short course or short training. To solve the problem, it is realized by holding a short course / training course on PCB Layout Creation with DIP TRACE and Dry Film Photoresist technology followed by etching process, drilling and installation of components that will be useful for students who want to do the main final work related with the manufacture of tools / hardware. Keywords: Making PCB, DIP TRACE, Dry Photoresist film

scholarly journals DRY FILM PHOTORESIST APPLICATION TO A PRINTED CIRCUIT BOARD (PCB) USING A MASKLESS PHOTOLITHOGRAPHY METHOD

2020 ◽  
Author(s):  
Dedi Suwandi
Keyword(s):  
Blue Light ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Digital Light Processing ◽  
Pcb Design ◽  
Projector Lamp ◽  
Light Color ◽  
Dry Film ◽  
Dry Film Photoresist ◽  
Pcb Routing

This paper offers an alternative method of making PCB routing using a negative dry film photoresist and a maskless photolithography method. The objective of this research is to determine the correct parameters for the process of making PCB design easier, cheaper and safer.Electronic circuit design was created on a laptop or PC using Autodesk EAGLE software with a combination of result is black and blue light color. PCB routing design was inserted into a PowerPoint slide to display on a commercial Digital Light Processing (DLP) projector. Nomodifications were made to a projector, which was mounted directly on a stand with a downwardfacing position. The projector lamp replaced an ultraviolet or X-ray source during the exposureprocess, exposing PCB coated in negative dry film photoresist. After the exposure process, the PCB was inserted into the developer solution, causing the blue light irradiated part to remain while the blackened sections dissolved. The PCB was then added to an etching solution to scrape the copper unprotected by the photoresist. The PCB was finally soaked in a remover solution to remove the photoresist. Once complete, the process generated a laptop-designed PCB routing. Electrical lines can be created using this method with a size of 100 µm and a lane edge deviation of 5 µm. The goal of research to make PCB routing cheaper, easier and safer was achieved. Evidenced by the installation of electronic components and then tested, the results are all components function well.

scholarly journals Dry Film Photoresist Application to a Printed Circuit Board (Pcb) using a Maskless Photolithography Method

2019 ◽  
Vol 10 (5) ◽  
pp. 1033
Author(s):  
Dedi Suwandi ◽  
Rofan Aziz ◽  
Agus Sifa ◽  
Emin Haris ◽  
Jos Istiyanto ◽  
...  
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Printed Circuit ◽  
Dry Film ◽  
Dry Film Photoresist

Design, Materials, Process, and Fabrication of Fan-Out Panel-Level Heterogeneous Integration

2018 ◽  
Vol 15 (4) ◽  
pp. 141-147 ◽  
Author(s):  
Cheng-Ta Ko ◽  
Henry Yang ◽  
John Lau ◽  
Ming Li ◽  
Margie Li ◽  
...  
Keyword(s):  
Seed Layer ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Heterogeneous Integration ◽  
Assembly Process ◽  
Molding Compound ◽  
Printed Circuit ◽  
Chip Size ◽  
Design Materials ◽  
Dry Film

Abstract The design, materials, process, and fabrication of a heterogeneous integration of four chips by a fan-out panel-level packaging (FOPLP) method are investigated in this study. Emphasis is placed on (1) the application of a dry-film epoxy molding compound for molding the chips and (2) the application of a special assembly process called uni-substrate-integrated package for fabricating the redistribution layers (RDLs) of the FOPLP. The Ajinomoto build-up film is used as the dielectric of the RDLs and is built up by the semiadditive process. Electroless Cu is used to make the seed layer, laser direct imaging is used for opening the photoresist, and printed circuit board (PCB) Cu plating is used for making the conductor wiring of the RDLs. The panel dimensions are 508 × 508 mm. The package dimensions of the FOPLP are 10 × 10 mm. The large chip size and the small chip sizes are, respectively, 5 × 5 mm and 3 × 3 mm. The uniqueness of this study is that all the processes are carried out by using the PCB equipment.

The applicability of electrodeposited photoresists in producing ultra‐fine lines using sputtered seeding layers

Circuit World ◽  
2002 ◽  
Vol 28 (2) ◽  
pp. 11-13 ◽  
Author(s):  
Paavo Jalonen ◽  
Aulis Tuominen
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Core Material ◽  
Quality Properties ◽  
Printed Circuit ◽  
Printed Circuit Board Manufacturing ◽  
Coating Method ◽  
Film Method ◽  
Seed Layers ◽  
Dry Film

Photolithographic techniques are universally employed in multi‐layer printed circuit board manufacturing. The growing demand for miniaturization of electronics means that finer lines and smaller vias are increasingly required and these very fine lines on the substrate are increasingly difficult to produce by conventional means. One very promising means of meeting these fine line requirements is via the etching of sputtered thin films on a substrate and then growing copper on these lines using an additive method. In this work we tested the capability of an electrodeposited, positive‐acting photoresist for patterning thin film circuits on sputtered seed layers such as chromium. A fully additive electroless copper was then used to produce the copper lines. Epoxy reinforced fibreglass was used as a core material. The performance and quality properties of the process were examined, along with limitations of the process when compared with both a conventional dry film method and a spin coating method.

Design, Materials, Process, and Fabrication of Fan-Out Panel-Level Heterogeneous Integration

2018 ◽  
Vol 2018 (1) ◽  
pp. 000057-000063 ◽  
Author(s):  
Cheng-Ta Ko ◽  
Henry Yang ◽  
John Lau ◽  
Ming Li ◽  
Margie Li ◽  
...  
Keyword(s):  
Seed Layer ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Heterogeneous Integration ◽  
Additive Process ◽  
Molding Compound ◽  
Printed Circuit ◽  
Chip Size ◽  
Design Materials ◽  
Dry Film

Abstract The design, materials, process, and fabrication of a heterogeneous integration of 4 chips by a FOPLP (fanout panel-level packaging) method are investigated in this study. Emphasis is placed on (a) the application of a dry-film EMC (epoxy molding compound) for molding the chips, and (b) the application of a special assembly process called Uni-SIP (uni-substrate-integrated-package) for fabricating the RDLs (redistribution layers) of the FOPLP. The ABF (Ajinomoto build-up film) is used as the dielectric of the RDLs and is built up by the SAP (semi-additive process). The electroless Cu is used to make the seed layer, the LDI (laser direct imaging) is used for opening the photoresist, and the PCB (printed circuit board) Cu plating is used for making the conductor wiring of the RDLs. The panel dimensions are 508mm × 508mm. The package dimensions of the FOPLP are 10mm × 10mm. The large chip size and the small chip sizes are, respectively 5mm × 5mm and 3mm × 3mm.

scholarly journals Mixed-Integer Linear Programming Model and Heuristic for Short-Term Scheduling of Pressing Process in Multi-Layer Printed Circuit Board Manufacturing

Mathematics ◽  
2021 ◽  
Vol 9 (6) ◽  
pp. 653
Author(s):  
Teeradech Laisupannawong ◽  
Boonyarit Intiyot ◽  
Chawalit Jeenanunta
Keyword(s):  
Linear Programming ◽  
Integer Linear Programming ◽  
Mixed Integer Linear Programming ◽  
Printed Circuit Board ◽  
Optimal Schedule ◽  
Circuit Board ◽  
Mixed Integer ◽  
Short Term ◽  
Printed Circuit ◽  
Pressing Process

The main stages of printed circuit board (PCB) manufacturing are the design, fabrication, assembly, and testing. This paper focuses on the scheduling of the pressing process, which is a part of the fabrication process of a multi-layer PCB and is a new application since it has never been investigated in the literature. A novel mixed-integer linear programming (MILP) formulation for short-term scheduling of the pressing process is presented. The objective function is to minimize the makespan of the overall process. Moreover, a three-phase-PCB-pressing heuristic (3P-PCB-PH) for short-term scheduling of the pressing process is also presented. To illustrate the proposed MILP model and 3P-PCB-PH, the test problems generated from the real data acquired from a PCB company are solved. The results show that the proposed MILP model can find an optimal schedule for all small- and medium-sized problems but can do so only for some large-sized problems using the CPLEX solver within a time limit of 2 h. However, the proposed 3P-PCB-PH could find an optimal schedule for all problems that the MILP could find using much less computational time. Furthermore, it can also quickly find a near-optimal schedule for other large-sized problems that the MILP could not solved optimally.

scholarly journals How to perform an ergonomic analysis of a workstation

2019 ◽  
Vol 7 (12) ◽  
pp. 474-491
Author(s):  
Carlos Domingues Ascate Júnior ◽  
Mariana Sarmanho de Oliveira Lima ◽  
Jonas Gomes da Silva
Keyword(s):  
Assembly Line ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Entire Body ◽  
Average Risk ◽  
Risk Minimization ◽  
Pcb Assembly ◽  
Work Related ◽  
The Face ◽  
Ergonomic Analysis

In the face of numerous complaints about upper limb pain of employees involved with a printed circuit board (PCB) assembly line, there was a need to assess the level of Work-Related Musculoskeletal Disorders (WRMD). To solve this problem, the research aimed to perform an ergonomic analysis in a workstation of an assembly line of a company X of the Manaus Industrial Pole (PIM). Therefore, the risks of WRMD were evaluated and the problems faced were diagnosed, to propose improvement actions to adapt the work environment to the workers. With the aid of the Ergonomic Work Analysis (EWA) method and the Rapid Entire Body Assessment (REBA) method for the assessment of the risks of WRMD, it was found that the operator was subjected to an average risk of WRMD and that the intervention for resolution or risk minimization was required. The operator's complaints were a pain in the shoulders, arms, and neck. In the end, five recommendations were suggested to company managers to solve or mitigate the problem.

Hardness of Rinse Water and Swelling Behavior of Dry Film Photo-Resist

2011 ◽  
Author(s):  
Song-I Kim ◽  
JinWoo Heo ◽  
YunHee Kim ◽  
Yeonseop Yu ◽  
ChungSik Choi ◽  
...  
Keyword(s):  
Photoelectron Spectroscopy ◽  
Focused Ion Beam ◽  
Printed Circuit Board ◽  
Divalent Cations ◽  
Ion Beam ◽  
Hard Water ◽  
Swelling Behavior ◽  
Circuit Board ◽  
Printed Circuit ◽  
Dry Film

Abstract We investigated the swelling behavior of dry film photoresist in rinse process after development by varying the hardness of water. We inspected the appearance of sidewalls and the foot of the resist. We also measured the depth of once swollen resist using a FIB (focused ion beam) and analyzed the chemistry of the resist after rinse using an XPS (X-ray photoelectron spectroscopy). We experimentally proved that divalent cations such as Ca2+ and Mg2+ in hard water could be exchanged with Na+ on the resist surface and quench swelling of the exposed resist in rinse. This study indicates that the use of hard water in rinse process may result in better line definition and resolution in PCB (printed circuit board).

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