scholarly journals DRY FILM PHOTORESIST APPLICATION TO A PRINTED CIRCUIT BOARD (PCB) USING A MASKLESS PHOTOLITHOGRAPHY METHOD

2020 ◽  
Author(s):  
Dedi Suwandi
Keyword(s):  
Blue Light ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Digital Light Processing ◽  
Pcb Design ◽  
Projector Lamp ◽  
Light Color ◽  
Dry Film ◽  
Dry Film Photoresist ◽  
Pcb Routing

This paper offers an alternative method of making PCB routing using a negative dry film photoresist and a maskless photolithography method. The objective of this research is to determine the correct parameters for the process of making PCB design easier, cheaper and safer.Electronic circuit design was created on a laptop or PC using Autodesk EAGLE software with a combination of result is black and blue light color. PCB routing design was inserted into a PowerPoint slide to display on a commercial Digital Light Processing (DLP) projector. Nomodifications were made to a projector, which was mounted directly on a stand with a downwardfacing position. The projector lamp replaced an ultraviolet or X-ray source during the exposureprocess, exposing PCB coated in negative dry film photoresist. After the exposure process, the PCB was inserted into the developer solution, causing the blue light irradiated part to remain while the blackened sections dissolved. The PCB was then added to an etching solution to scrape the copper unprotected by the photoresist. The PCB was finally soaked in a remover solution to remove the photoresist. Once complete, the process generated a laptop-designed PCB routing. Electrical lines can be created using this method with a size of 100 µm and a lane edge deviation of 5 µm. The goal of research to make PCB routing cheaper, easier and safer was achieved. Evidenced by the installation of electronic components and then tested, the results are all components function well.

scholarly journals PELATIHAN PEMBUATAN LAYOUT PCB DENGAN DIP TRACE DAN DRY FILM PHOTORESIST BAGI SMK MUHAMMADIYAH 2 SALAM MAGELANG

2018 ◽  
Vol 1 (1) ◽  
pp. 13
Author(s):  
Denny Dermawan
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Short Term ◽  
Work Related ◽  
Short Course ◽  
Photoresist Film ◽  
Near Term ◽  
Dry Film ◽  
Final Work ◽  
Dry Film Photoresist

The desire of students of SMK Muhammadiyah 2 Salam Magelang to be able to make a printed circuit board is something that is very important to be welcomed and followed up wisely so that the desire of the students is not just a wishful dream but will be a reality. This activity is meant to be an effort not only to overcome difficulties at certain times (short-term activities), but is expected to be sustainable for the future (longer term). Looking at the fact, of course, should be strived to realize the handling of the problem at least for the near term. For that required activities that are practical and immediate benefits can be taken as the activity can be a short course or short training. To solve the problem, it is realized by holding a short course / training course on PCB Layout Creation with DIP TRACE and Dry Film Photoresist technology followed by etching process, drilling and installation of components that will be useful for students who want to do the main final work related with the manufacture of tools / hardware. Keywords: Making PCB, DIP TRACE, Dry Photoresist film

scholarly journals Dry Film Photoresist Application to a Printed Circuit Board (Pcb) using a Maskless Photolithography Method

2019 ◽  
Vol 10 (5) ◽  
pp. 1033
Author(s):  
Dedi Suwandi ◽  
Rofan Aziz ◽  
Agus Sifa ◽  
Emin Haris ◽  
Jos Istiyanto ◽  
...  
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Printed Circuit ◽  
Dry Film ◽  
Dry Film Photoresist

Design, Materials, Process, and Fabrication of Fan-Out Panel-Level Heterogeneous Integration

2018 ◽  
Vol 15 (4) ◽  
pp. 141-147 ◽  
Author(s):  
Cheng-Ta Ko ◽  
Henry Yang ◽  
John Lau ◽  
Ming Li ◽  
Margie Li ◽  
...  
Keyword(s):  
Seed Layer ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Heterogeneous Integration ◽  
Assembly Process ◽  
Molding Compound ◽  
Printed Circuit ◽  
Chip Size ◽  
Design Materials ◽  
Dry Film

Abstract The design, materials, process, and fabrication of a heterogeneous integration of four chips by a fan-out panel-level packaging (FOPLP) method are investigated in this study. Emphasis is placed on (1) the application of a dry-film epoxy molding compound for molding the chips and (2) the application of a special assembly process called uni-substrate-integrated package for fabricating the redistribution layers (RDLs) of the FOPLP. The Ajinomoto build-up film is used as the dielectric of the RDLs and is built up by the semiadditive process. Electroless Cu is used to make the seed layer, laser direct imaging is used for opening the photoresist, and printed circuit board (PCB) Cu plating is used for making the conductor wiring of the RDLs. The panel dimensions are 508 × 508 mm. The package dimensions of the FOPLP are 10 × 10 mm. The large chip size and the small chip sizes are, respectively, 5 × 5 mm and 3 × 3 mm. The uniqueness of this study is that all the processes are carried out by using the PCB equipment.

The applicability of electrodeposited photoresists in producing ultra‐fine lines using sputtered seeding layers

Circuit World ◽  
2002 ◽  
Vol 28 (2) ◽  
pp. 11-13 ◽  
Author(s):  
Paavo Jalonen ◽  
Aulis Tuominen
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Core Material ◽  
Quality Properties ◽  
Printed Circuit ◽  
Printed Circuit Board Manufacturing ◽  
Coating Method ◽  
Film Method ◽  
Seed Layers ◽  
Dry Film

Photolithographic techniques are universally employed in multi‐layer printed circuit board manufacturing. The growing demand for miniaturization of electronics means that finer lines and smaller vias are increasingly required and these very fine lines on the substrate are increasingly difficult to produce by conventional means. One very promising means of meeting these fine line requirements is via the etching of sputtered thin films on a substrate and then growing copper on these lines using an additive method. In this work we tested the capability of an electrodeposited, positive‐acting photoresist for patterning thin film circuits on sputtered seed layers such as chromium. A fully additive electroless copper was then used to produce the copper lines. Epoxy reinforced fibreglass was used as a core material. The performance and quality properties of the process were examined, along with limitations of the process when compared with both a conventional dry film method and a spin coating method.

Experimental Study on PCB Micro Drilling Force

2012 ◽  
Vol 246-247 ◽  
pp. 1017-1021 ◽  
Author(s):  
Feng Gong ◽  
Bai Qiang Chen ◽  
Ji Bin Li
Keyword(s):  
Experimental Study ◽  
Cutting Force ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Drilling Machine ◽  
Drilling Force ◽  
Printed Circuit ◽  
Market Competitiveness ◽  
Pcb Design ◽  
Micro Drilling

With the development of high density, multi-functions, miniaturization and multi-layer on printed circuit board (PCB) design, great challenges have been presented to the miniaturization of drilling on PCB. In order to meet the hole precision, quality and improve the performance, efficiency of mechanical drilling, further research should be done on the cutting state. Kistler high-precision micro-force platform was used in this paper to test and analyze the cutting force, investigate the general laws of micro drilling, and optimize the parameters for HANS PCB drilling machine. Thereby, to improve the efficiency and precision of the drilling, range of processing, and increasing market competitiveness.

FIDOE: A Framework for Intelligent Distributed Ontologies in Engineering

2008 ◽  
Author(s):  
Paul Witherell ◽  
Sundar Krishnamurty ◽  
Ian R. Grosse ◽  
Jack Wileden
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Distributed Environment ◽  
Design Problems ◽  
Design Changes ◽  
Pcb Design ◽  
Common Domain ◽  
Distributed Process ◽  
Solid Foundation ◽  
Future Work

This paper presents FIDOE, a Framework for Intelligent Distributed Ontologies in Engineering. FIDOE consists of a suite of logic rules and templates for interactively developing relationships between properties of linked ontologies. The logical rules embedded in FIDOE automatically operate on various discipline-specific ontologies to systematically identify influences, direct and indirect, of proposed design modifications on other aspects of the design through common domain concepts. Once potential influences are identified, FIDOE enables the user to precisely define the domain relationships, using predefined templates, between the identified domain concepts that enumerate influence types. This tool, thus, provides a pervasive, real time awareness of the implications of design changes during the design process in a distributed environment. The application of FIDOE to distributed and multidisciplinary design problems is detailed with the aid of an industry-provided printed circuit board (PCB) design. Here, commonalities among indirectly connected domain ontologies (electrical, mechanical and thermal domains) are identified using the developed query method and subsequent relationships are defined. These relationships are then applied to provide a collaborative understanding and awareness of the distributed process, all while demonstrating the effectiveness of this approach. This awareness was successfully able to address some previously identified industry concerns, returning promising results while laying a solid foundation for future work.

Design, Materials, Process, and Fabrication of Fan-Out Panel-Level Heterogeneous Integration

2018 ◽  
Vol 2018 (1) ◽  
pp. 000057-000063 ◽  
Author(s):  
Cheng-Ta Ko ◽  
Henry Yang ◽  
John Lau ◽  
Ming Li ◽  
Margie Li ◽  
...  
Keyword(s):  
Seed Layer ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Heterogeneous Integration ◽  
Additive Process ◽  
Molding Compound ◽  
Printed Circuit ◽  
Chip Size ◽  
Design Materials ◽  
Dry Film

Abstract The design, materials, process, and fabrication of a heterogeneous integration of 4 chips by a FOPLP (fanout panel-level packaging) method are investigated in this study. Emphasis is placed on (a) the application of a dry-film EMC (epoxy molding compound) for molding the chips, and (b) the application of a special assembly process called Uni-SIP (uni-substrate-integrated-package) for fabricating the RDLs (redistribution layers) of the FOPLP. The ABF (Ajinomoto build-up film) is used as the dielectric of the RDLs and is built up by the SAP (semi-additive process). The electroless Cu is used to make the seed layer, the LDI (laser direct imaging) is used for opening the photoresist, and the PCB (printed circuit board) Cu plating is used for making the conductor wiring of the RDLs. The panel dimensions are 508mm × 508mm. The package dimensions of the FOPLP are 10mm × 10mm. The large chip size and the small chip sizes are, respectively 5mm × 5mm and 3mm × 3mm.

Research of Reliable Design of Printed Circuit Board Suited for Smart Grid

2012 ◽  
Vol 229-231 ◽  
pp. 1503-1506
Author(s):  
Chuan Liu ◽  
Zai Chao Huang ◽  
Peng Wu ◽  
Zhi Gang Wu ◽  
Lei Chen
Keyword(s):  
Smart Grid ◽  
Communication System ◽  
Energy Demand ◽  
Printed Circuit Board ◽  
High Reliability ◽  
Circuit Board ◽  
Self Healing ◽  
Stage Of Development ◽  
Pcb Design ◽  
Smart Grid Communication

Electric utilities faced with the prospect of increasing customer rates are seeking solutions to challenges presented by rising global energy demand, aging infrastructure, increasing fuel costs and renewable portfolio standards in light of climate change. Many consider Smart Grid to be one such solution. The most two significant characteristics of Smart Grid are self-healing ability and high reliability. As the bottom stage of development of Smart Grid communication system, the signal quality and self reliability of PCB design directly influence the entire performance of the communication system. This article focuses on analyzing reliable PCB design suited for Smart Grid communication system from power supply, thermal dispersion and trace routing.

scholarly journals The Development of a Modified Design Chain Operations Reference Model in New Product Development of the Printed Circuit Board: A Case Study

2020 ◽  
Vol 10 (11) ◽  
pp. 3703
Author(s):  
Ping-Shun Chen ◽  
Jimmy Ching-Ming Chen ◽  
Wen-Tso Huang ◽  
Li-Yin Kuo
Keyword(s):  
Product Development ◽  
New Product Development ◽  
Printed Circuit Board ◽  
Reference Model ◽  
New Product ◽  
Circuit Board ◽  
Future Research ◽  
Printed Circuit ◽  
Design Chain ◽  
Pcb Design

New product development (NPD) is a process of interactions among multiple parties. With stronger competition in the electronic product market, reducing NPD cycle time has become a common important subject in the information technology (IT) industry. The main topic of this research is process improvements in the research and development (R&D) department of the case company by studying how product competitiveness can be enhanced in the current rapid proceeding technology industry. The process-oriented and hierarchical structure is used to analyze the processes of a new printed circuit board (PCB) design and test, and then a modified design chain operations reference (DCOR) model is introduced to explore problems and suggest corresponding solutions. This research also specifies a clear design chain structure for the case firm and improves its R&D process by brainstorming. The goal is to increase the case firm’s PCB design chain efficiency by shortening the delivery time and reducing the problems of risks arising during the NPD. Finally, this research reviews the essence of the design chain management, draws conclusions, and points out directions for future research.

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