Signal Trace and Power Plane Shorts Fault Isolation Using TDR

2001 ◽  
Author(s):  
Dima Smolyansky ◽  
Phoumra Tan ◽  
Donald Staab
Keyword(s):  
Time Domain Reflectometry ◽  
Fault Isolation ◽  
Isolation System ◽  
Fault Locating ◽  
Test Board ◽  
Impedance Profile ◽  
The Difference ◽  
The Time Domain ◽  
Secondary Information ◽  
Failure Location

Abstract The focus of this article is on locating signal-to-ground shorts and plane-to-plane shorts using the time domain reflectometry (TDR) based fault isolation system. The article proposes two comparative techniques for plane-to-plane short location, both based on the secondary information in the TDR data. The first technique looks for the difference in secondary reflections in the TDR waveform and the second looks at the inductance of the current return path, which can be computed in IConnect TDR software. The article presents simple test board example for plane-to-plane short failure location and discusses the results obtained by applying the TDR technique to the measurements of a sample package under test. Locating a signal-to-ground short has been shown to present little difficulty over a comparable open fault locating task. However, with the true impedance profile and planar inductance analyses, the claim of impossibility of locating a plane-to-plane is effectively challenged in this paper.

Advanced Non-Destructive Fault Isolation Techniques for PCB Substrates Using Magnetic Current Imaging and Terahertz Time Domain Reflectometry

2018 ◽  
Author(s):  
Daechul Choi ◽  
Yoonseong Kim ◽  
Jongyun Kim ◽  
Han Kim
Keyword(s):  
Time Domain ◽  
Quantum Interference ◽  
Flip Chip ◽  
Imaging System ◽  
Time Domain Reflectometry ◽  
Fault Isolation ◽  
Magnetic Current ◽  
Isolation Techniques ◽  
Super Conducting ◽  
Non Destructive

Abstract In this paper, we demonstrate cases for actual short and open failures in FCB (Flip Chip Bonding) substrates by using novel non-destructive techniques, known as SSM (Scanning Super-conducting Quantum Interference Device Microscopy) and Terahertz TDR (Time Domain Reflectometry) which is able to pinpoint failure locations. In addition, the defect location and accuracy is verified by a NIR (Near Infra-red) imaging system which is also one of the commonly used non-destructive failure analysis tools, and good agreement was made.

Time Domain Reflectometry Technique for Failure Analysis

2004 ◽  
Author(s):  
Teoh King Long ◽  
Ko Yin Fern
Keyword(s):  
Failure Analysis ◽  
Time Domain ◽  
Time Domain Reflectometry ◽  
Fault Isolation ◽  
Reference Plane ◽  
First Case ◽  
Main Emphasis ◽  
Plastic Ball ◽  
Solder Balls ◽  
Non Destructive

Abstract In time domain reflectometry (TDR), the main emphasis lies on the reflected waveform. Poor probing contact is one of the common problems in getting an accurate waveform. TDR probe normalization is essential before measuring any TDR waveforms. The advantages of normalization include removal of test setup errors in the original test pulse and the establishment of a measurement reference plane. This article presents two case histories. The first case is about a Plastic Ball Grid Array package consisting of 352 solder balls where the open failure mode was encountered at various terminals after reliability assessment. In the second, a three-digit display LED suspected of an electrical short failure was analyzed using TDR as a fault isolation tool. TDR has been successfully used to perform non-destructive fault isolation in assisting the routine failure analysis of open and short failure. It is shown to be accurate and reduces the time needed to identify fault locations.

Fault Isolation of High Resistance Defects Using Comparative Magnetic Field Imaging

2003 ◽  
Author(s):  
Antonio Orozco ◽  
Elena Talanova ◽  
Anders Gilbertson ◽  
L.A. Knauss ◽  
Zhiyong Wang ◽  
...  
Keyword(s):  
Magnetic Field ◽  
High Resistance ◽  
Integrated Circuit ◽  
Time Domain Reflectometry ◽  
Fault Isolation ◽  
Main Stream ◽  
Layer By Layer ◽  
Impedance Change ◽  
Resistance Change ◽  
Require Time

Abstract As integrated circuit packages become more complicated, the localization of defects becomes correspondingly more difficult. One particularly difficult class of defects to localize is high resistance (HR) defects. These defects include cracked traces, delaminated vias, C4 non-wet defects, PTH cracks, and any other package or interconnect structure that results in a signal line resistance change that exceeds the specification of the device. These defects can result in devices that do not run at full speed, are not reliable in the field, or simply do not work at all. The main approach for localizing these defects today is time domain reflectometry (TDR) [1]. TDR sends a short electrical pulse into the device and monitors the time to receive reflections. These reflections can correspond to shorts, opens, bends in a wire, normal interfaces between devices, or high resistance defects. Ultimately anything that produces an electrical impedance change will produce a TDR response. These signals are compared to a good part and require time consuming layer-by-layer deprocessing and comparison to a standard part. When complete, the localization is typically at best to within 200 microns. A new approach to isolating high resistance defects has been recently developed using current imaging. In recent years, current imaging through magnetic field detection has become a main-stream approach for short localization in the package [2] and is also heavily utilized for die level applications [3]. This core technology has been applied to the localization of high resistance defects. This paper will describe the approach, and give examples of test samples as well as results from actual yield failures.

Electronic Package Failure Analysis Using TDR

2000 ◽  
Author(s):  
Dima A. Smolyansky
Keyword(s):  
Failure Analysis ◽  
Fault Location ◽  
Measurement Accuracy ◽  
Time Domain Reflectometry ◽  
Acoustic Imaging ◽  
X Ray ◽  
Analysis Techniques ◽  
Bga Packages ◽  
Impedance Profile ◽  
Nature Of Time

Abstract The visual nature of Time Domain Reflectometry (TDR) makes it a very natural technology that can assist with fault location in BGA packages, which typically have complex interweaving layouts that make standard failure analysis techniques, such as acoustic imaging and X-ray, less effective and more difficult to utilize. This article discusses the use of TDR for package failure analysis work. It analyzes in detail the TDR impedance deconvolution algorithm as applicable to electronic packaging fault location work, focusing on the opportunities that impedance deconvolution and the resulting true impedance profile opens up for such work. The article examines the TDR measurement accuracy and the comparative package failure analysis, and presents three main considerations for package failure analysis. It also touches upon the goal and the task of the failure analysts and TDR's specific signatures for the open and short connections.

Pseudo-Dynamic Fault Isolation Technique Using Backside Emission Microscopy – Case Study, Where All Other Methods Fail

2002 ◽  
Author(s):  
Yoav Weizman ◽  
Ezra Baruch ◽  
Michael Zimin
Keyword(s):  
Failure Analysis ◽  
Process Variations ◽  
Fault Isolation ◽  
Operating Conditions ◽  
Detection Sensitivity ◽  
Isolation Technique ◽  
Root Cause ◽  
Emission Microscopy ◽  
Failure Location ◽  
Noisy Background

Abstract Emission microscopy is usually implemented for static operating conditions of the DUT. Under dynamic operation it is nearly impossible to identify a failure out of the noisy background. In this paper we describe a simple technique that could be used in cases where the temporal location of the failure was identified however the physical location is not known or partially known. The technique was originally introduced to investigate IDDq failures (1) in order to investigate timing related issues with automated tester equipment. Ishii et al (2) improved the technique and coupled an emission microscope to the tester for functional failure analysis of DRAMs and logic LSIs. Using consecutive step-by-step tester halting coupled to a sensitive emission microscope, one is able detect the failure while it occurs. We will describe a failure analysis case in which marginal design and process variations combined to create contention at certain logic states. Since the failure occurred arbitrarily, the use of the traditional LVP, that requires a stable failure, misled the analysts. Furthermore, even if we used advanced tools as PICA, which was actually designed to locate such failures, we believe that there would have been little chance of observing the failure since the failure appeared only below 1.3V where the PICA tool has diminished photon detection sensitivity. For this case the step-by-step halting technique helped to isolate the failure location after a short round of measurements. With the use of logic simulations, the root cause of the failure was clear once the failing gate was known.

Advanced Fault Isolation Technique Using Electro-Optical Terahertz Pulse Reflectometry (EOTPR) for 2D and 2.5D Flip-Chip Package

2012 ◽  
Author(s):  
Lihong Cao ◽  
Manasa Venkata ◽  
Meng Yeow Tay ◽  
Wen Qiu ◽  
J. Alton ◽  
...  
Keyword(s):  
Time Domain ◽  
Flip Chip ◽  
Time Domain Reflectometry ◽  
Fault Isolation ◽  
Experimental Results ◽  
Terahertz Pulse ◽  
Isolation And Identification ◽  
Isolation Technique ◽  
Non Destructive

Abstract Electro-optical terahertz pulse reflectometry (EOTPR) was introduced last year to isolate faults in advanced IC packages. The EOTPR system provides 10μm accuracy that can be used to non-destructively localize a package-level failure. In this paper, an EOTPR system is used for non-destructive fault isolation and identification for both 2D and 2.5D with TSV structure of flip-chip packages. The experimental results demonstrate higher accuracy of the EOTPR system in determining the distance to defect compared to the traditional time-domain reflectometry (TDR) systems.

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