Coating-Based PCB Protection against Tampering, Snooping, EM Attack, and X-ray Reverse Engineering

2018 ◽  
Author(s):  
Haoting Shen ◽  
M Tanjidur Rahman ◽  
Navid Asadizanjani ◽  
Mark Tehranipoor ◽  
Swarup Bhunia
Keyword(s):  
Integrated Circuits ◽  
Reverse Engineering ◽  
Printed Circuit Boards ◽  
Economic Trend ◽  
Circuit Boards ◽  
X Ray ◽  
Active Defense ◽  
Non Invasive ◽  
Pcb Manufacturing ◽  
Cost Efficient

Abstract In the last decades, the supply chain of printed circuit boards (PCBs) becomes distributed with growing complexity of PCB designs and the economic trend of outsourcing the PCB manufacturing. This makes the PCBs more vulnerable to security attacks, such as tampering, snooping, and electromagnetic (EM) attacks. Because of the large feature size of PCBs (compared to integrated circuits), it is challenging to protect the PCBs from those attacks or proof the suspected attacks. For the same reason, PCBs are vulnerable to non-invasive reverse engineering by X-ray tomography as well. In this paper, we propose a novel silicon carbide (SiC) coating technique to provide passive protection for PCBs from in-field tampering, snooping and EM attacks. In addition, capacitive sensors are designed based on the SiC coating, offering active defense against those attacks. The coating and sensors can be implemented on PCBs in cost-efficient ways and the area overheads are minimized. The insulating coating also allows an extra tungsten-based painting to be applied to prevent the X-ray reverse engineering.

Non-Destructive PCB Reverse Engineering Using X-Ray Micro Computed Tomography

2015 ◽  
Author(s):  
Navid Asadizanjani ◽  
Sina Shahbazmohamadi ◽  
Mark Tehranipoor ◽  
Domenic Forte
Keyword(s):  
Reverse Engineering ◽  
Printed Circuit Boards ◽  
Advanced Characterization ◽  
Fault Isolation ◽  
Lessons Learned ◽  
Circuit Boards ◽  
Micro Computed Tomography ◽  
X Ray ◽  
Printed Circuit ◽  
Non Destructive

Abstract Reverse engineering of electronics systems is performed for various reasons ranging from honest ones such as failure analysis, fault isolation, trustworthiness verification, obsolescence management, etc. to dishonest ones such as cloning, counterfeiting, identification of vulnerabilities, development of attacks, etc. Regardless of the goal, it is imperative that the research community understands the requirements, complexities, and limitations of reverse engineering. Until recently, the reverse engineering was considered as destructive, time consuming, and prohibitively expensive, thereby restricting its application to a few remote cases. However, the advents of advanced characterization and imaging tools and software have counteracted this point of view. In this paper, we show how X-ray micro-tomography imaging can be combined with advanced 3D image processing and analysis to facilitate the automation of reverse engineering, and thereby lowering the associated time and cost. In this paper, we demonstrate our proposed process on two different printed circuit boards (PCBs). The first PCB is a four-layer custom designed board while the latter is a more complex commercial system. Lessons learned from this effort can be used to both develop advanced countermeasures and establish a more efficient workflow for instances where reverse engineering is deemed necessary. Keywords: Printed circuit boards, non-destructive imaging, X-ray tomography, reverse engineering.

Hardware Trust and Assurance through Reverse Engineering: A Tutorial and Outlook from Image Analysis and Machine Learning Perspectives

2021 ◽  
Vol 17 (4) ◽  
pp. 1-53
Author(s):  
Ulbert J. Botero ◽  
Ronald Wilson ◽  
Hangwei Lu ◽  
Mir Tanjidur Rahman ◽  
Mukhil A. Mallaiyan ◽  
...  
Keyword(s):  
Machine Learning ◽  
Integrated Circuits ◽  
Reverse Engineering ◽  
Printed Circuit Boards ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Fields Of Study ◽  
Firm Basis ◽  
Hardware Trust ◽  
Illegal Action

In the context of hardware trust and assurance, reverse engineering has been often considered as an illegal action. Generally speaking, reverse engineering aims to retrieve information from a product, i.e., integrated circuits (ICs) and printed circuit boards (PCBs) in hardware security-related scenarios, in the hope of understanding the functionality of the device and determining its constituent components. Hence, it can raise serious issues concerning Intellectual Property (IP) infringement, the (in)effectiveness of security-related measures, and even new opportunities for injecting hardware Trojans. Ironically, reverse engineering can enable IP owners to verify and validate the design. Nevertheless, this cannot be achieved without overcoming numerous obstacles that limit successful outcomes of the reverse engineering process. This article surveys these challenges from two complementary perspectives: image processing and machine learning. These two fields of study form a firm basis for the enhancement of efficiency and accuracy of reverse engineering processes for both PCBs and ICs. In summary, therefore, this article presents a roadmap indicating clearly the actions to be taken to fulfill hardware trust and assurance objectives.

A New Methodology to Protect PCBs from Nondestructive Reverse Engineering

2016 ◽  
Author(s):  
Zimu Guo ◽  
Bicky Shakya ◽  
Haoting Shen ◽  
Swarup Bhunia ◽  
Navid Asadizanjani ◽  
...  
Keyword(s):  
Reverse Engineering ◽  
Printed Circuit Boards ◽  
Advanced Characterization ◽  
Electronic Systems ◽  
Circuit Boards ◽  
X Ray ◽  
Reverse Engineer ◽  
Electronic Hardware ◽  
Non Destructive ◽  
Destructive Methods

Abstract Reverse engineering of electronic hardware has been performed for decades for two broad purposes: (1) honest and legal means for failure analysis and trust verification; and (2) dishonest and illegal means of cloning, counterfeiting, and development of attacks on hardware to gain competitive edge in a market. Destructive methods have been typically considered most effective to reverse engineer Printed Circuit Boards (PCBs) – a platform used in nearly all electronic systems to mechanically support and electrically connect all hardware components. However, the advent of advanced characterization and imaging tools such as X-ray tomography has shifted the reverse engineering of electronics toward non-destructive methods. These methods considerably lower the associated time and cost to reverse engineer a complex multi-layer PCB. In this paper, we introduce a new anti–reverse engineering method to protect PCBs from non-destructive reverse engineering. We add high-Z materials inside PCBs and develop advanced layout algorithms, which create inevitable imaging artifacts during tomography, thereby making it practically infeasible for an adversary to extract correct design information with X-ray tomography.

Suitable Conditions for Effective Inter Chip Communication based on Surface Wave Phenomenon

2021 ◽  
Vol 14 ◽  
Author(s):  
Mahaveer Penna ◽  
Shiva Shankar ◽  
Keshava Murthy ◽  
Jijesh J J
Keyword(s):  
Surface Wave ◽  
Integrated Circuits ◽  
Electromagnetic Waves ◽  
Printed Circuit Boards ◽  
Analytical Models ◽  
Circuit Boards ◽  
High Frequencies ◽  
Printed Circuit ◽  
High Data ◽  
Low Dispersion

Background: The communication between two Integrated Circuits (IC) of the Printed Circuit Boards (PCB) currently happening through copper traces which allow electric charge to flow. Several limitations being encountered with the copper traces during high data rate communication because of the resistivity factors, which eventually leads to the damage of traces and the system. Methods: The solution for this issue comes with the design of surface wave communication-based waveguide/channel between the IC’s. Surface wave communication over a specified communication fabric/channel performs the propagation of electromagnetic waves effectively even at high frequencies compared to the copper traces using conductor-dielectric combination. This paper deals in revealing suitable conditions through profound analytical models for achieving effective surface wave communication between the pins of integrated circuits. Results: The analysis includes defining the possible wave propagation terms, suitable channel design aspects for PCB application and corresponding analysis for effective communication at frequencies from 50GHz to 500GHz of millimeter range. This study provides the roadmap to explore a deterministic channel/fabric for pin to pin communication between the IC’s as an alternate for the copper traces. Conclusion: In this process, the proposed channel achieves low dispersion compared to the copper traces at millimeter frequency range.

An Overview of 3D X-Ray Reconstruction Algorithms for PCB Inspection

2020 ◽  
Author(s):  
Alexandra Roberts ◽  
John True ◽  
Nathan T. Jessurun ◽  
Dr. Navid Asadizanjani
Keyword(s):  
Open Source ◽  
Printed Circuit Boards ◽  
Critical Role ◽  
Reconstruction Algorithms ◽  
X Ray ◽  
Reconstruction Methods ◽  
Verification Methods ◽  
Pcb Manufacturing ◽  
Micro Tomography ◽  
The Government

Abstract Printed Circuit Boards (PCBs) play a critical role in everyday electronic systems, therefore the quality and assurance of the functionality for these systems is a topic of great interest to the government and industry. PCB manufacturing has been largely outsourced to cut manufacturing costs in comparison with the designing and testing of PCBs which still retains a large presence domestically. This offshoring of manufacturing has created a surge in the supply chain vulnerability for potential adversaries to garner access and attack a device via a malicious modification. Current hardware assurance and verification methods are based on electrical and optical tests. These tests are limited in the detection of malicious hardware modifications, otherwise known as Hardware Trojans. For PCB manufacturing there has been an increase in the use of automated X-ray inspection. These inspections can validate a PCB’s functionality during production. Such inspections mitigate process errors in real time but are unable to perform highresolution characterization on multi-layer fully assembled PCBs. In this paper, several X-ray reconstruction methods, ranging from proprietary to open-source, are compared. The high-fidelity, commercial NRecon software for SkyScan 2211 Multi-scale X-ray micro-Tomography system is compared to various methods from the ASTRA Toolbox. The latter is an open-source, transparent approach to reconstruction via analytical and iterative methods. The toolbox is based on C++ and MEX file functions with MATLAB and Python wrappers for analysis of PCB samples. In addition, the differences in required imaging parameters and the resultant artifacts generated by planar PCBs are compared to the imaging of cylindrical biological samples. Finally, recommendations are made for improving the ASTRA Toolbox reconstruction results and guidance is given on the appropriate scenarios for each algorithm in the context of hardware assurance for PCBs.

scholarly journals Biodismantling, a Novel Application of Bioleaching in Recycling of Electronic Wastes

Recycling ◽  
2020 ◽  
Vol 5 (3) ◽  
pp. 22
Author(s):  
Benjamin Monneron-Enaud ◽  
Oliver Wiche ◽  
Michael Schlömann
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Boards ◽  
Raw Materials ◽  
Iron Sulfate ◽  
Circuit Boards ◽  
Copper Leaching ◽  
Valuable Metals ◽  
A New Technique ◽  
Abiotic Controls ◽  
Processing Steps

Electronic components (EC) from waste electrical and electronic equipment (WEEE) such as resistors, capacitors, diodes and integrated circuits are a subassembly of printed circuit boards (PCB). They contain a variety of economically valuable elements e.g., tantalum, palladium, gold, and rare earth elements. However, until recently there has been no systematic dismantling and recycling of the EC to satisfy the demand for raw materials. A problem connected with the recycling of the EC is the removal of the components (dismantling) in order to recover the elements in later processing steps. The aim of the present study was to develop a new technique of dismantling using bioleaching technology to lower costs and environmental impact. In triplicate batch experiments, used PCBs were treated by bioleaching using an iron-oxidizing mixed culture largely dominated by Acidithiobacillus ferrooxidans strains supplemented with 20 mM ferrous iron sulfate at pH 1.8 and 30 °C for 20 days. Abiotic controls were treated by similar conditions in two different variations: 20 mM of Fe2+ and 15 mM of Fe3+. After 20 days, successful dismantling was obtained in both the bioleaching and the Fe3+ control batch. The control with Fe2+ did not show a significant effect. The bioleaching condition presented a lower rate of dismantling which can partially be explained by a constantly higher redox potential leading to a competition of solder leaching and copper leaching from the printed copper wires. The results showed that biodismantling—dismantling using bioleaching—is possible and can be a new unit operation of the recycling process to maximize the recovery of valuable metals from PCBs.

scholarly journals High-Density Interconnect Technology Assessment of Printed Circuit Boards for Space Applications

2020 ◽  
Vol 17 (3) ◽  
pp. 79-88
Author(s):  
Maarten Cauwe ◽  
Bart Vandevelde ◽  
Chinmay Nawghane ◽  
Marnix Van De Slyeke ◽  
Erwin Bosman ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Boards ◽  
Digital Signal ◽  
High Density ◽  
Circuit Boards ◽  
Space Applications ◽  
Track Width ◽  
Printed Circuit ◽  
Field Programmable ◽  
Space Projects

Abstract High-density interconnect (HDI) printed circuit boards (PCBs) and associated assemblies are essential to allow space projects to benefit from the ever increasing complexity and functionality of modern integrated circuits such as field-programmable gate arrays, digital signal processors and application processors. Increasing demands for functionality translate into higher signal speeds combined with an increasing number of input/outputs (I/Os). To limit the overall package size, the contact pad pitch of the components is reduced. The combination of a high number of I/Os with a reduced pitch places additional demands onto the PCB, requiring the use of laser-drilled microvias, high-aspect ratio core vias, and small track width and spacing. Although the associated advanced manufacturing processes have been widely used in commercial, automotive, medical, and military applications, reconciling these advancements in capability with the reliability requirements for space remains a challenge. Two categories of the HDI technology are considered: two levels of staggered microvias (basic HDI) and (up to) three levels of stacked microvias (complex HDI). In this article, the qualification of the basic HDI technology in accordance with ECSS-Q-ST-70-60C is described. At 1.0-mm pitch, the technology passes all testing successfully. At .8-mm pitch, failures are encountered during interconnection stress testing and conductive anodic filament testing. These failures provide the basis for updating the design rules for HDI PCBs.

scholarly journals PCB access impedances extraction method of in-situ integrated circuit

2018 ◽  
Vol 7 (3) ◽  
pp. 108-116 ◽  
Author(s):  
Z. Xu ◽  
B. Ravelo ◽  
J. Gantet ◽  
N. Marier
Keyword(s):  
Integrated Circuits ◽  
Transmission Lines ◽  
Integrated Circuit ◽  
Extraction Method ◽  
Printed Circuit Boards ◽  
Voltage Source ◽  
Circuit Boards ◽  
Passive Network ◽  
Impedance Extraction ◽  
Network Good

This article describes an extraction technique of input and output impedances of integrated circuits (ICs) implemented onto the printed circuit boards (PCBs). The feasibility of the technique is illustrated with a proof-of-concept (POC) constituted by two ICs operating in a typically transmitter-receiver (Tx-Rx) circuit. The POC system is assumed composed of three different blocks of emitter signal source, load and interconnect passive network. This latter one is assumed defined by its chain matrix known from its electrical and physical characteristics. The proposed impedance extraction method is elaborated from the given signals at the transmitter output and receiver input. The terminal access impedances are formulated in function of the parameters of the interconnect system chain matrix. The feasibility of the method is checked with a passive circuit constituted by transmission lines driven by voltage source with RL-series network internal impedance and loaded at the output by the RC-parallel network. Good correlation between the access impedance reference and calculated is found.

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