scholarly journals Integrated Thermal Management in System-on-Package Devices

2019 ◽  
Vol 64 (2) ◽  
pp. 200-210
Author(s):  
György Bognár ◽  
Gábor Takács ◽  
Péter G. Szabó ◽  
Gábor Rózsás ◽  
László Pohl ◽  
...  

Thanks to the System-on-Package technology (SoP) the integration of different elements into a single package was enabled. However, from the thermal point of view the heat removal path in modern packaging technologies (FCBGA) goes through several layers of thermal interface material (TIM) that together with the package material create a relatively high thermal resistance which may lead to elevated chip temperature which causes functional error or other malfunctions. In our concept, we overcome this problem by creating integrated microfluidic channel based heat sink structures that can be used for cooling the high heat dissipation semiconductor devices (e.g.: processors, high power transistor or concentrated solar cells). These microchannel cooling assemblies can be integrated into the backside of the substrate of the semiconductor devices or into the system assemblies in SoP technology. In addition to the realization of the novel CMOS compatible microscale cooling device we have developed precise and valid measurement methodology, simulation cases studies and a unique compact model that can be added to numerical simulators as an external node. In this paper the achievements of a larger research are summarized as it required the cooperation of several experts in their fields to fulfil the goal of creating a state-of-the-art demonstrator. Thanks to the System-on-Package technology (SoP) the integration of different elements into a single package was enabled. However, from the thermal point of view the heat removal path in modern packaging technologies (FCBGA) goes through several layers of thermal interface material (TIM) that together with the package material create a relatively high thermal resistance which may lead to elevated chip temperature which causes functional error or other malfunctions. In our concept, we overcome this problem by creating integrated microfluidic channel based heat sink structures that can be used for cooling the high heat dissipation semiconductor devices (e.g.: processors, high power transistor or concentrated solar cells). These microchannel cooling assemblies can be integrated into the backside of the substrate of the semiconductor devices or into the system assemblies in SoP technology. In addition to the realization of the novel CMOS compatible microscale cooling device we have developed precise and valid measurement methodology, simulation cases studies and a unique compact model that can be added to numerical simulators as an external node. In this paper the achievements of a larger research are summarized as it required the cooperation of several experts in their fields to fulfil the goal of creating a state-of-the-art demonstrator.

2015 ◽  
Vol 137 (3) ◽  
Author(s):  
Abas Abdoli ◽  
George S. Dulikravich ◽  
Genesis Vasquez ◽  
Siavash Rastkar

Two-layer single phase flow microchannels were studied for cooling of electronic chips with a hot spot. A chip with 2.45 × 2.45 mm footprint and a hot spot of 0.5 × 0.5 mm in its center was studied in this research. Two different cases were simulated in which heat fluxes of 1500 W cm−2 and 2000 W cm−2 were applied at the hot spot. Heat flux of 1000 W cm−2 was applied on the rest of the chip. Each microchannel layer had 20 channels with an aspect ratio of 4:1. Direction of the second microchannel layer was rotated 90 deg with respect to the first layer. Fully three-dimensional (3D) conjugate heat transfer analysis was performed to study the heat removal capacity of the proposed two-layer microchannel cooling design for high heat flux chips. In the next step, a linear stress analysis was performed to investigate the effects of thermal stresses applied to the microchannel cooling design due to variations of temperature field. Results showed that two-layer microchannel configuration was capable of removing heat from high heat flux chips with a hot spot.


Author(s):  
J. C. Matayabas ◽  
Vassou LeBonheur

The recent trend in microprocessor architecture has been to increase the number of transistors (higher power), shrink processor size (smaller die), and increase clock speeds (higher frequency) in order to meet the market demand for high performance microprocessors. These have resulted in the escalation of power dissipation as well as the heat flux at the silicon die level. The Intel packaging technology development group has been challenged to develop packaging solutions that not only meet the package thermal targets but also the reliability requirements. As a result, an integrated heat spreading (IHS) package was developed, comprising a Cu based heat spreader and a first level thermal interface material (TIM) between the die and the heat spreader. Due to CTE mismatches between its different elements, the IHS package is subjected to high level of thermo-mechanical stresses which lead to severe failures post reliability testing. A significant amount of theoretical understanding of thermal resistance has been developed and applied to the development of TIM formulations, and it was found that the thermo-mechanical properties of the TIM material need to be optimized to mitigate the package reliability stresses. Several material and process solutions have been investigated using fundamental approaches, and, as a result of these efforts, low stress silicone gel TIM’s were developed. This paper provides an overview of the silicone gel TIM technologies investigated at Intel, and the key learnings from the fundamental material and package integration studies.


Author(s):  
Rong Xiao ◽  
Kuang-Han Chu ◽  
Evelyn N. Wang

The heat generation rates of high performance electronics motivate the development of new thermal management solutions. Thin film evaporation with a jet impingement or spray system promise high heat fluxes up to 1000 W/cm2 with low thermal resistances. However, challenges with implementation currently limit the ability to reach the theoretical limits. In this work, we investigated the utilization of micro-/nanostructured surfaces to control the liquid film thickness and provide a sufficient liquid flow rate to achieve high heat removal rates. We developed a model to predict the propagation rates of the liquid film, which accounted for the curvature of the liquid meniscus. We also fabricated test devices with pillar diameters ranging from 500 nm to 10 μm, spacings of 3.5 μm to 10 μm, and heights of 5 μm to 15 μm, and validated the model with confocal microscopy and high speed imaging. Heaters and temperature sensors were also integrated onto the back side of the chip to investigate heat transfer performance. When heat was applied, the structures significantly enhanced the heat dissipation rates and reduced the thermal resistance. The heat dissipation rate was also found to be positively correlated to the propagation rate of the liquid film. However, surface fouling in the experiments led to challenges to maintain a stable liquid film, and decreased the heat removal capability. This work provides insights to designing micro-/nanostructured surfaces for thin film evaporation to meet the heat dissipation demands of future high performance electronic systems.


2012 ◽  
Vol 588-589 ◽  
pp. 1735-1739 ◽  
Author(s):  
Yu Qiang Wang ◽  
Ni Liu ◽  
Xiao Jiao Xu

Spray cooling is considered to be one of the most promising electronic cooling methods, since it has several unique advantages such as high heat dissipation, small fluid inventory, and uniformity of heat removal. However the spray cooling performance could be further improved, which can be expressed by the combination of a better heat removal capability, a higher cooling efficiency, and the more uniform surface temperature distribution. In this paper, recent research developments on spray cooling characteristics under different working conditions are reviewed, possible approaches to improve the spray cooing performance are also proposed. Especially spray cooling systems with both enhanced surface and lower system pressure would be be full of attraction.


2017 ◽  
Author(s):  
Tomio Okawa ◽  
Junki Ohashi ◽  
Ryo Hirata ◽  
Koji Enoki

Author(s):  
Y. Chai ◽  
W. Tian ◽  
J. Tian ◽  
L. W. Jin ◽  
X. Z. Meng ◽  
...  

Abstract In recent years, a primary concern in the development of electronic technology is high heat dissipation of power devices. The advantages of unique thermal physical properties of graphite foam raise up the possibility of developing pool boiling system with better heat transfer efficiency. A compact thermosyphon was developed with graphite foam insertions to explore how different parameters affect boiling performance. Heater wall temperature, superheat, departure frequency of bubbles, and thermal resistance of the system were analyzed. The results indicated that the boiling performance is affected significantly by thermal conductivity and pore diameter of graphite foam. A proposed heat transfer empirical correlation reflecting the relations between graphite foam micro structures and pool boiling performance of Novec7100 was developed in this paper.


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