scholarly journals Embedded Silicon Nanoparticles as Enabler of a Novel CMOS-Compatible Fully Integrated Silicon Photonics Platform

Crystals ◽  
2021 ◽  
Vol 11 (6) ◽  
pp. 630
Author(s):  
Alfredo A. González-Fernández ◽  
Mariano Aceves-Mijares ◽  
Oscar Pérez-Díaz ◽  
Joaquin Hernández-Betanzos ◽  
Carlos Domínguez
Keyword(s):  
Silicon Nanoparticles ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Visible Range ◽  
Light Sources ◽  
Light Emitters ◽  
Si Photonics ◽  
Cmos Compatible ◽  
Integrated Silicon Photonics ◽  
Quantum Phenomena

The historical bottleneck for truly high scale integrated photonics is the light emitter. The lack of monolithically integrable light sources increases costs and reduces scalability. Quantum phenomena found in embedded Si particles in the nanometer scale is a way of overcoming the limitations for bulk Si to emit light. Integrable light sources based in Si nanoparticles can be obtained by different CMOS (Complementary Metal Oxide Semiconductor) -compatible materials and techniques. Such materials in combination with Si3N4 photonic elements allow for integrated Si photonics, in which photodetectors can also be included directly in standard Si wafers, taking advantage of the emission in the visible range by the embedded Si nanocrystals/nanoparticles. We present the advances and perspectives on seamless monolithic integration of CMOS-compatible visible light emitters, photonic elements, and photodetectors, which are shown to be viable and promising well within the technological limits imposed by standard fabrication methods.

scholarly journals A Thermopile Device with Subwavelength Structure by CMOS-MEMS Technology

2019 ◽  
Vol 9 (23) ◽  
pp. 5118 ◽  
Author(s):  
Chih-Hsiung Shen ◽  
Yun-Ying Yeh ◽  
Chi-Feng Chen
Keyword(s):  
Fdtd Method ◽  
Complementary Metal Oxide Semiconductor ◽  
Absorption Efficiency ◽  
Oxide Semiconductor ◽  
Visible Range ◽  
Subwavelength Structure ◽  
Mems Technology ◽  
Cmos Mems ◽  
Cmos Compatible ◽  
Simulation Results

Besides the application of the photonic crystal for the photodetector in the visible range, the infrared devices proposed with subwavelength structure are numerically and experimentally investigated thoroughly for infrared radiation sensing in this research. Several complementary metal oxide semiconductor (CMOS) compatible thermopiles with subwavelength structure (SWS) are proposed and simulated by the FDTD method. The proposed thermopiles are fabricated by the 0.35 μm 2P4M CMOS-MEMS process in TSMC (Taiwan Semiconductor Manufacturing Company). The measurement and simulation results show that the response of these devices with SWS is higher than for those without SWS. The trend of the measurement results is consistent with that of the simulation results. Obviously, the absorption efficiency of the CMOS compatible thermopile can be enhanced when the subwavelength structure exists.

scholarly journals A highly stable, nanotube-enhanced, CMOS-MEMS thermal emitter for mid-IR gas sensing

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Daniel Popa ◽  
Richard Hopper ◽  
Syed Zeeshan Ali ◽  
Matthew Thomas Cole ◽  
Ye Fan ◽  
...  
Keyword(s):  
Gas Sensing ◽  
Low Cost ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Light Sources ◽  
Mir Spectroscopy ◽  
Sensing Applications ◽  
Cmos Mems ◽  
Extended Operation ◽  
On Chip

AbstractThe gas sensor market is growing fast, driven by many socioeconomic and industrial factors. Mid-infrared (MIR) gas sensors offer excellent performance for an increasing number of sensing applications in healthcare, smart homes, and the automotive sector. Having access to low-cost, miniaturized, energy efficient light sources is of critical importance for the monolithic integration of MIR sensors. Here, we present an on-chip broadband thermal MIR source fabricated by combining a complementary metal oxide semiconductor (CMOS) micro-hotplate with a dielectric-encapsulated carbon nanotube (CNT) blackbody layer. The micro-hotplate was used during fabrication as a micro-reactor to facilitate high temperature (>700 $$^{\circ }$$ ∘ C) growth of the CNT layer and also for post-growth thermal annealing. We demonstrate, for the first time, stable extended operation in air of devices with a dielectric-encapsulated CNT layer at heater temperatures above 600 $$^{\circ }$$ ∘ C. The demonstrated devices exhibit almost unitary emissivity across the entire MIR spectrum, offering an ideal solution for low-cost, highly-integrated MIR spectroscopy for the Internet of Things.

scholarly journals A highly stable, nanotube-enhanced, CMOS-MEMS thermal emitter for mid-IR gas sensing

2021 ◽  
Author(s):  
Daniel Popa ◽  
Richard Hopper ◽  
Syed Zeeshan Ali ◽  
Matthew Cole ◽  
Ye Fan ◽  
...  
Keyword(s):  
Gas Sensing ◽  
Low Cost ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Light Sources ◽  
Mir Spectroscopy ◽  
Sensing Applications ◽  
Cmos Mems ◽  
Extended Operation ◽  
On Chip

Abstract The gas sensor market is growing fast, driven by many socioeconomic and industrial factors. Mid-infrared (MIR) gas sensors offer excellent performance for an increasing number of sensing applications in healthcare, smart homes, and the automotive sector. Having access to low-cost, miniaturized, energy efficient light sources is of critical importance for the monolithic integration of MIR sensors. Here, we present an on-chip broadband thermal MIR source fabricated by combining a complementary metal oxide semiconductor (CMOS) micro-hotplate with a dielectric-encapsulated carbon nanotube (CNT) blackbody layer. The micro-hotplate was used during fabrication as a micro-reactor to facilitate high temperature (>700 • C) growth of the CNT layer and also for post-growth thermal annealing. We demonstrate, for the first time, stable extended operation in air of devices with a dielectric-encapsulated CNT layer at heater temperatures above 600 • C. The demonstrated devices exhibit almost unitary emissivity across the entire MIR spectrum, offering an ideal solution for low-cost, highly-integrated MIR spectroscopy for the Internet of Sensors.

Heterogeneous Integration of a 300-mm Silicon Photonics-CMOS Wafer Stack by Direct Oxide Bonding and Via-Last 3-D Interconnection

2016 ◽  
Vol 13 (2) ◽  
pp. 71-76 ◽  
Author(s):  
Colin McDonough ◽  
Doug La Tulipe ◽  
Dan Pascual ◽  
Paul Tariello ◽  
John Mucci ◽  
...  
Keyword(s):  
Three Dimensional ◽  
Complementary Metal Oxide Semiconductor ◽  
Silicon On Insulator ◽  
Oxide Semiconductor ◽  
Heterogeneous Integration ◽  
Production Environment ◽  
Si Photonics ◽  
Electrical Connections ◽  
First Time ◽  
Low Capacitance

A fully functional Si photonics and 65-nm complementary metal-oxide semiconductor (CMOS) heterogeneous three-dimensional (3-D) integration is demonstrated for the first time in a 300-mm production environment. Direct oxide wafer bonding was developed to eliminate voids between silicon on insulator photonics and bulk Si CMOS wafers. A via-last, Cu through-oxide via 3-D integration was developed for low capacitance electrical connections with no impact on the CMOS performance. The 3-D yield approaching 100% was demonstrated on >20,000 via chains.

Green Synthesis of Ge1-xSnx Alloy Nanoparticles for Optoelectronic Applications

Crystals ◽  
2021 ◽  
Vol 11 (10) ◽  
pp. 1216
Author(s):  
Gopal Singh Attar ◽  
Mimi Liu ◽  
Cheng-Yu Lai ◽  
Daniela R. Radu
Keyword(s):  
Band Gap ◽  
Complementary Metal Oxide Semiconductor ◽  
Cmos Technology ◽  
Oxide Semiconductor ◽  
Colloidal Synthesis ◽  
Alloy Nanoparticles ◽  
Direct Band Gap ◽  
Si Photonics ◽  
Group Iv Semiconductor ◽  
Direct Band

Compositionally controlled, light-emitting, group IV semiconductor nanomaterials have potential to enable on-chip data communications and infrared (IR) imaging devices compatible with the complementary metal−oxide−semiconductor (CMOS) technology. The recent demonstration of a direct band gap laser in Ge-Sn alloys opens avenues to the expansion of Si-photonics. Ge-Sn alloys showed improved effective carrier mobility as well as direct band gap behavior at Sn composition above 6–11%. In this work, Ge1−xSnx alloy nanoparticles with varying Sn compositions from x = 0.124 to 0.178 were prepared via colloidal synthesis using sodium borohydride (NaBH4), a mild and non-hazardous reducing reagent. Successful removal of the synthesized long-alkyl-chain ligands present on nanoparticles’ surfaces, along with the passivation of the Ge-Sn nanoparticle surface, was achieved using aqueous (NH4)2S. The highly reactive surface of the nanoparticles prior to ligand exchange often leads to the formation of germanium oxide (GeO2). This work demonstrates that the (NH4)2S further acts as an etching reagent to remove the oxide layer from the particles’ surfaces. The compositional control and long-term stability will enable the future use of these easily prepared Ge1−xSnx nanoalloys in optoelectronic devices.

Open Circuit Voltage and Single Walled Carbon Nanotube (wt%) Dependency in Solid-State Complementary Metal Oxide Semiconductor-Compatible Glucose Fuel Cells

2020 ◽  
Vol 12 (1) ◽  
pp. 101-106
Author(s):  
Md. Zahidul Islam ◽  
Shigeki Arata ◽  
Kenya Hayashi ◽  
Atsuki Kobayashi ◽  
Kiichi Niitsu
Keyword(s):  
Carbon Nanotube ◽  
Fuel Cell ◽  
Open Circuit Voltage ◽  
Complementary Metal Oxide Semiconductor ◽  
Open Circuit ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Single Walled Carbon Nanotube ◽  
Single Walled Carbon ◽  
Cmos Compatible

Solid-state complementary metal oxide semiconductor (CMOS)-compatible glucose fuel cells, with single-walled carbon nanotube (SWCNT) films and different amounts of carbon nanotube (wt%) were investigated. Those with a SWCNT content of 3 wt% were found to develop the highest open circuit voltage (OCV) of 400 mV, together with a high electrical conductivity, a power density of 0.53 μW/cm2 and current density of 1.31 μA/cm2. Measurements were performed by dipping the anode into a 30 mM glucose solution. The OCV and power density increased together with the fuel cell concentration. The developed fuel cell uses materials that are biocompatible with the human body (single-walled carbon nanotube-glucose). As a result, it was possible to attain an OCV of 400 mV with a single-walled carbon nanotube content of 3 wt% while improvements in the performance of the CMOS-compatible glucose fuel cell were obtained, and the parameters affecting the performance of the fuel cell were identified. This bio-fuel cell was fabricated using CMOS semiconductor processes on a silicon wafer. These findings are significant to realizing mobile or implantable devices that can be used for biomedical applications.

A CMOS Compatible Metal-Polymer Microchannel Heat Sink for Monolithic Chip Cooling Applications

2010 ◽  
Author(s):  
Aziz Koyuncuog˘lu ◽  
Tuba Okutucu ◽  
Haluk Ku¨lah
Keyword(s):  
Heat Sink ◽  
Complementary Metal Oxide Semiconductor ◽  
Heat Sinks ◽  
Oxide Semiconductor ◽  
Microchannel Heat Sink ◽  
Liquid Cooling ◽  
Chip Cooling ◽  
Electronic Circuitry ◽  
Cmos Compatible ◽  
Adjacent Channels

A novel complementary metal oxide semiconductor (CMOS) compatible microchannel heat sink is designed and fabricated for monolithic liquid cooling of electronic circuits. The microchannels are fabricated with full metal walls between adjacent channels with a polymer top layer for easy sealing and optical visibility of the channels. The use of polymer also provides flexibility in adjusting the width of the channels allowing better management of the pressure drop. The proposed microchannel heat sink requires no design change of the electronic circuitry underneath, hence, can be produced by adding a few more steps to the standard CMOS fabrication flow. The microchannel heat sinks were tested successfully under various heat flux and coolant flow rate conditions. The preliminary cooling tests indicate that the proposed design is promising as a monolithic liquid cooling solution for CMOS circuits.

scholarly journals CMOS-compatible photonic devices for single-photon generation

Nanophotonics ◽  
2016 ◽  
Vol 5 (3) ◽  
pp. 427-439 ◽  
Author(s):  
Chunle Xiong ◽  
Bryn Bell ◽  
Benjamin J. Eggleton
Keyword(s):  
Secure Communication ◽  
Single Photon ◽  
Complementary Metal Oxide Semiconductor ◽  
Building Blocks ◽  
Photonic Devices ◽  
Oxide Semiconductor ◽  
Single Photons ◽  
Quantum Secure Communication ◽  
Cmos Compatible ◽  
Photon Generation

AbstractSources of single photons are one of the key building blocks for quantum photonic technologies such as quantum secure communication and powerful quantum computing. To bring the proof-of-principle demonstration of these technologies from the laboratory to the real world, complementary metal–oxide–semiconductor (CMOS)-compatible photonic chips are highly desirable for photon generation, manipulation, processing and even detection because of their compactness, scalability, robustness, and the potential for integration with electronics. In this paper, we review the development of photonic devices made from materials (e.g., silicon) and processes that are compatible with CMOS fabrication facilities for the generation of single photons.

A Complementary Metal Oxide Semiconductor (CMOS) Compatible Capacitive Silicon Accelerometer with Polysilicon Rib-Style Flexures

1998 ◽  
Vol 37 (Part 1, No. 12B) ◽  
pp. 7093-7099 ◽  
Author(s):  
Seokyu Kim ◽  
Youngjoo Yee ◽  
Hyeoncheol Kim ◽  
Kukjin Chun ◽  
Ikpyo Hong ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Cmos Compatible

scholarly journals Photoluminescence enhancement by deterministically site-controlled, vertically stacked SiGe quantum dots

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Jeffrey Schuster ◽  
Johannes Aberl ◽  
Lada Vukušić ◽  
Lukas Spindlberger ◽  
Heiko Groiss ◽  
...  
Keyword(s):  
Light Emission ◽  
Thermal Quenching ◽  
Single Layer ◽  
Complementary Metal Oxide Semiconductor ◽  
Strain Engineering ◽  
Nucleation Site ◽  
Oxide Semiconductor ◽  
Light Sources ◽  
Indirect Band Gap ◽  
Sige Quantum Dot

AbstractThe Si/SiGe heterosystem would be ideally suited for the realization of complementary metal-oxide-semiconductor (CMOS)-compatible integrated light sources, but the indirect band gap, exacerbated by a type-II band offset, makes it challenging to achieve efficient light emission. We address this problem by strain engineering in ordered arrays of vertically close-stacked SiGe quantum dot (QD) pairs. The strain induced by the respective lower QD creates a preferential nucleation site for the upper one and strains the upper QD as well as the Si cap above it. Electrons are confined in the strain pockets in the Si cap, which leads to an enhanced wave function overlap with the heavy holes near the upper QD’s apex. With a thickness of the Si spacer between the stacked QDs below 5 nm, we separated the functions of the two QDs: The role of the lower one is that of a pure stressor, whereas only the upper QD facilitates radiative recombination of QD-bound excitons. We report on the design and strain engineering of the QD pairs via strain-dependent Schrödinger-Poisson simulations, their implementation by molecular beam epitaxy, and a comprehensive study of their structural and optical properties in comparison with those of single-layer SiGe QD arrays. We find that the double QD arrangement shifts the thermal quenching of the photoluminescence signal at higher temperatures. Moreover, detrimental light emission from the QD-related wetting layers is suppressed in the double-QD configuration.

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