scholarly journals Impact of the Ferroelectric Stack Lamination in Si Doped Hafnium Oxide (HSO) and Hafnium Zirconium Oxide (HZO) Based FeFETs: Toward High-Density Multi-Level Cell and Synaptic Storage

2021 ◽  
Vol 2 (3) ◽  
pp. 344-369
Author(s):  
Tarek Ali ◽  
Kati Kühnel ◽  
Ricardo Olivo ◽  
David Lehninger ◽  
Franz Müller ◽  
...  
Keyword(s):  
Zirconium Oxide ◽  
Hafnium Oxide ◽  
Ferroelectric Properties ◽  
Charge Trapping ◽  
Switching Speed ◽  
Columnar Grains ◽  
Lower Maximum ◽  
Si Doped ◽  
Multi Level ◽  
The Impact

A multi-level cell (MLC) operation as a 1–3 bit/cell of the FeFET emerging memory is reported by utilizing optimized Si doped hafnium oxide (HSO) and hafnium zirconium oxide (HZO) based on ferroelectric laminates. An alumina interlayer was used to achieve the thickness independent of the HSO and HZO-based stack with optimal ferroelectric properties. Various split thicknesses of the HSO and HZO were explored with lamination to increase the FeFET maximum memory window (MW) for a practical MLC operation. A higher MW occurred as the ferroelectric stack thickness increased with lamination. The maximum MW (3.5 V) was obtained for the HZO-based laminate; the FeFETs demonstrated a switching speed (300 ns), 10 years MLC retention, and 104 MLC endurance. The transition from instant switching to increased MLC levels was realized by ferroelectric lamination. This indicated an increased film granularity and a reduced variability through the interruption of ferroelectric columnar grains. The 2–3 bit/cell MLC levels and maximum MW were studied in terms of the size-dependent variability to indicate the impact of the ferroelectric area scaling. The impact of an alumina interlayer on the ferroelectric phase is outlined for HSO in comparison to the HZO material. For the same ferroelectric stack thickness with lamination, a lower maximum MW, and a pronounced wakeup effect was observed in HSO laminate compared to the HZO laminate. Both wakeup effect and charge trapping were studied in the context of an MLC operation. The merits of ferroelectric stack lamination are considered for an optimal FeFET-based synaptic device operation. The impact of the pulsing scheme was studied to modulate the FeFET current to mimic the synaptic weight update in long-term synaptic potentiation/depression.

scholarly journals Room temperature PVD TiN to improve the ferroelectric properties of HZO films in the BEoL

MRS Advances ◽  
2021 ◽  
Author(s):  
David Lehninger ◽  
Konstantin Mertens ◽  
Lukas Gerlich ◽  
Maximilian Lederer ◽  
Tarek Ali ◽  
...  
Keyword(s):  
Vapor Deposition ◽  
Hafnium Oxide ◽  
Physical Vapor Deposition ◽  
Room Temperature ◽  
Ferroelectric Properties ◽  
Chemical Vapor ◽  
Atomic Layer ◽  
Logic Device ◽  
Process Gas ◽  
The Impact

Abstract Zirconium-doped hafnium oxide (HZO) crystallizes at low temperatures and is thus ideal to implement ferroelectric (FE) functionalities into the back end of line (BEoL). Therefore, metal-ferroelectric-metal (MFM) capacitors are of great interest. Placed in the BEoL, they can be connected either to the drain- or the gate-contact of a standard logic device to realize different emerging FE-embedded non-volatile memory (eNVM) concepts. However, the low crystallization temperature increases also the risk for a premature crystallization of the HZO films during the growth of the top electrode (TE), in particular, if high-temperature processes like atomic layer deposition (ALD) or chemical vapor deposition (CVD) are used. Herein, the TE is deposited at room temperature via physical vapor deposition (PVD). The impact of different process gas flows on the FE properties of the HZO films is studied by X-ray diffraction and polarization versus electric field measurements. Graphic abstract

The impact of the mass density on selected optical and non-optical properties of oxide coatings

2014 ◽  
Vol 3 (1) ◽  
Author(s):  
Olaf Stenzel
Keyword(s):  
Silicon Dioxide ◽  
Zirconium Oxide ◽  
Hafnium Oxide ◽  
Optical Constants ◽  
Mass Density ◽  
Tantalum Pentoxide ◽  
Optical Coatings ◽  
Oxide Coatings ◽  
Numerous Experimental Data ◽  
The Impact

AbstractThe density of optical coatings is one of the most crucial material-related parameters in interference coating science and technology. It has an impact on the refractive index, the transparency range, and the mechanical stress of a coating material. This tutorial provides a background on the classical theory relating the coating density to the mentioned parameters. Simple models are presented that highlight the correlations between optical constants, stress, and shifting behavior of different oxide coatings. Comparison with the experiment is performed on the basis of numerous experimental data, which stem from hafnium oxide, zirconium oxide, tantalum pentoxide, and silicon dioxide.

Thermal-aware Output Polarity Selection Based on And-Inverter Graph Manipulation

2019 ◽  
Vol 12 (1) ◽  
pp. 30-39 ◽  
Author(s):  
Apangshu Das ◽  
Sambhu Nath Pradhan
Keyword(s):  
Integrated Circuits ◽  
Power Density ◽  
Logic Synthesis ◽  
Programmable Logic Arrays ◽  
Power Switching ◽  
Nsga Ii ◽  
Multi Level ◽  
Search Approach ◽  
Efficient Power ◽  
The Impact

Background: Output polarity of the sub-function is generally considered to reduce the area and power of a circuit at the two-level realization. Along with area and power, the power-density is also one of the significant parameter which needs to be consider, because power-density directly converges to circuit temperature. More than 50% of the modern day integrated circuits are damaged due to excessive overheating. Methods: This work demonstrates the impact of efficient power density based logic synthesis (in the form of suitable polarity selection of sub-function of Programmable Logic Arrays (PLAs) for its multilevel realization) for the reduction of temperature. Two-level PLA optimization using output polarity selection is considered first and compared with other existing techniques and then And-Invert Graphs (AIG) based multi-level realization has been considered to overcome the redundant solution generated in two-level synthesis. AIG nodes and associated power dissipation can be reduced by rewriting, refactoring and balancing technique. Reduction of nodes leads to the reduction of the area but on the contrary increases power and power density of the circuit. A meta-heuristic search approach i.e., Nondominated Sorting Genetic Algorithm-II (NSGA-II) is proposed to select the suitable output polarity of PLA sub-functions for its optimal realization. Results: Best power density based solution saves up to 8.29% power density compared to ‘espresso – dopo’ based solutions. Around 9.57% saving in area and 9.67% saving in power (switching activity) are obtained with respect to ‘espresso’ based solution using NSGA-II. Conclusion: Suitable output polarity realized circuit is converted into multi-level AIG structure and synthesized to overcome the redundant solution at the two-level circuit. It is observed that with the increase in power density, the temperature of a particular circuit is also increases.

scholarly journals On the Impact of the Gate Work-Function Metal on the Charge Trapping Component of NBTI and PBTI

2019 ◽  
Vol 19 (2) ◽  
pp. 268-274 ◽  
Author(s):  
J. Franco ◽  
Z. Wu ◽  
G. Rzepa ◽  
L.-A. Ragnarsson ◽  
H. Dekkers ◽  
...  
Keyword(s):  
Work Function ◽  
Charge Trapping ◽  
The Impact ◽  
Gate Work Function

scholarly journals Speeding Up the Write Operation for Multi-Level Cell Phase Change Memory with Programmable Ramp-Down Current Pulses

Micromachines ◽  
2019 ◽  
Vol 10 (7) ◽  
pp. 461 ◽  
Author(s):  
Chenchen Xie ◽  
Xi Li ◽  
Houpeng Chen ◽  
Yang Li ◽  
Yuanguang Liu ◽  
...  
Keyword(s):  
Phase Change ◽  
Current Source ◽  
Phase Change Memory ◽  
Operation Time ◽  
Access Time ◽  
Fully Differential ◽  
Current Pulses ◽  
Multi Level ◽  
The Impact ◽  
Change Memory

Multi-level cell (MLC) phase change memory (PCM) can not only effectively multiply the memory capacity while maintaining the cell area, but also has infinite potential in the application of the artificial neural network. The write and verify scheme is usually adopted to reduce the impact of device-to-device variability at the expense of a greater operation time and more power consumption. This paper proposes a novel write operation for multi-level cell phase change memory: Programmable ramp-down current pulses are utilized to program the RESET initialized memory cells to the expected resistance levels. In addition, a fully differential read circuit with an optional reference current source is employed to complete the readout operation. Eventually, a 2-bit/cell phase change memory chip is presented with a more efficient write operation of a single current pulse and a read access time of 65 ns. Some experiments are implemented to demonstrate the resistance distribution and the drift.

The Construction of Engineering Projects Environmental Performance Auditing

2013 ◽  
Vol 834-836 ◽  
pp. 2045-2048
Author(s):  
Xiao Ning Qu
Keyword(s):  
Environmental Performance ◽  
Internal Audit ◽  
Engineering Project ◽  
Whole Process ◽  
Social Audit ◽  
Multi Level ◽  
Performance Auditing ◽  
And Control ◽  
The Impact ◽  
Engineering Projects

The Environmental performance auditing is one professional audit that auditing the environmental performance of engineering project. We construct a multi-level auditing network in the whole process of project. That network can be divided into government audit, social audit and internal audit. And with which we predict, evaluate and control the impact on environmental effectively.

Effect of Interface and Crystallinity on the Ferroelectric Properties of Poly(Vinylidene Fluoride-Trifluoroethylene) Copolymer Thin Films

2001 ◽  
Vol 665 ◽  
Author(s):  
Feng Xia ◽  
H.S. Xu ◽  
Babak Razavi ◽  
Q. M. Zhang
Keyword(s):  
Thin Films ◽  
Vinylidene Fluoride ◽  
Ferroelectric Properties ◽  
Large Change ◽  
Thickness Dependence ◽  
Dielectric Measurement ◽  
Switching Speed ◽  
Wide Range ◽  
Poly Vinylidene Fluoride ◽  
Polarization Level

ABSTRACTFerroelectric polymer thin films are attractive for a wide range of applications such as MEMS, IR sensors, and memory devices. We present the results of a recent investigation on the thickness dependence of the ferroelectric properties of poly(vinylidene fluoridetrifluoroethylene) copolymer spin cast films on electroded Si substrate. We show that as the film thickness is reduced, there exist two thickness regions. For films at thickness above 100 nm, the thickness dependence of the ferroelectric properties can be attributed to the interface effect. However, for thinner films, there is a large change in the ferroelectric properties such as the polarization level, the coercive field, and polarization switching speed, which is related to the large drop of the crystallinity in the ultrathin film region (below 100 nm). The results from Xray, dielectric measurement, and AFM all indicate that there is a threshold thickness at about 100 nm below which the crystallinity in the film reduces abruptly.

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