scholarly journals A New 4D Hyperchaotic System and Its Analog and Digital Implementation

Electronics ◽  
2021 ◽  
Vol 10 (15) ◽  
pp. 1793
Author(s):  
Rodrigo Daniel Méndez-Ramírez ◽  
Adrian Arellano-Delgado ◽  
Miguel Angel Murillo-Escobar ◽  
César Cruz-Hernández

This work presents a new four-dimensional autonomous hyperchaotic system based on Méndez-Arellano-Cruz-Martínez (MACM) 3D chaotic system. Analytical and numerical studies of the dynamic properties are conducted for the new hyperchaotic system (NHS) in its continuous version (CV), where the Lyapunov exponents are calculated. The CV of the NHS is simulated and implemented using operational amplifiers (OAs), whereas the Discretized Version (DV) is simulated and implemented in real-time. Besides, a novel study of the algorithm performance of the proposed DV of NHS is conducted with the digital-electronic implementation of the floating-point versus Q1.15 fixed-point format by using the Digital Signal Processor (DSP) engine of a 16-bit dsPIC microcontroller and two external dual digital to analog converters (DACs) in an embedded system (ES).

Complexity ◽  
2017 ◽  
Vol 2017 ◽  
pp. 1-13 ◽  
Author(s):  
Rodrigo Méndez-Ramírez ◽  
Adrian Arellano-Delgado ◽  
César Cruz-Hernández ◽  
Rigoberto Martínez-Clark

This paper presents a new three-dimensional autonomous chaotic system. The proposed system generates a chaotic attractor with the variation of two parameters. Analytical and numerical studies of the dynamic properties to generate chaos, for continuous version (CV) and discretized version (DV), for the new chaotic system (NCS) were conducted. The CV of the NCS was implemented by using an electronic circuit with operational amplifiers (OAs). In addition, the presence of chaos for DV of the NCS was proved by using the analytical and numerical degradation tests; the time series was calculated to determine the behavior of Lyapunov exponents (LEs). Finally, the DV of NCS was implemented, in real-time, by using a novel embedded system (ES) Mikromedia Plus for PIC32MX7 that includes one microcontroller PIC32 and one thin film transistor touch-screen display (TFTTSD), together with external digital-to-analog converters (DACs).


2020 ◽  
Vol 17 (1) ◽  
pp. 172988141990043
Author(s):  
Xiaochun Guan ◽  
Jianlin Huang ◽  
Tinglong Tang

The great development of robot vision represented by deep learning places urgent demands on embedded vision implementation. This article introduces a hardware framework for implementation of embedded vision based on digital signal processor, which can be widely used in robot vision applications. Firstly, the article discusses implementation of a pretrained typical convolutional neural network on the digital signal processor embedded system for real-time handwritten digit recognition. Then, the article introduces the migration of OpenCV software packages to digital signal processor embedded system and the implementation flow of face detection algorithms with OpenCV on digital signal processor. The experimental results are remarkable with convolutional neural networks for handwritten digit recognition. This article provides a convenient and feasible design scheme of digital signal processor system for implementation of embedded vision.


Author(s):  
Saber Krim ◽  
Soufien Gdaim ◽  
Abdellatif Mtibaa ◽  
Mohamed Faouzi Mimouni

<p>This paper proposes a digital implementation of the direct torque control (DTC) of an Induction Motor (IM) with an observation strategy on the Field Programmable Gate Array (FPGA). The hardware solution based on the FPGA is caracterised by fast processing speed due to the parallel processing. In this study the FPGA is used to overcome the limitation of the software solutions (Digital Signal Processor (DSP) and Microcontroller). Also, the DTC of IM has many drawbacks such as for example; The open loop pure integration has from the problems of integration especially at the low speed and the variation of the stator resistance due to the temperature. To tackle these problems we use the Sliding Mode Observer (SMO). This observer is used estimate the stator flux, the stator current and the stator resistance. The hardware implementation method is based on Xilinx System Generator (XSG) which a modeling tool developed by Xilinx for the design of implemented systems on FPGA; from the design of the DTC with SMO from XSG we can automatically generate the VHDL code. The model of the DTC with SMO has been designed and simulated using XSG blocks, synthesized with Xilinx ISE 12.4 tool and implemented on Xilinx Virtex-V FPGA.</p>


Author(s):  
Abdellah Narjiss ◽  
Daniel Depernet ◽  
Frédéric Gustin ◽  
Daniel Hissel ◽  
Alain Berthon

This work consists in a theoretical and practical study of a dc/dc converter designed to be coupled to a fuel cell stack in transport applications. It also proposes analysis and control of the whole system using digital signal processor (DSP) controller. The research is focused on the integration of a polymer electrolyte fuel cell (PEFC) stack in an embedded system. The fuel cell is characterized by a low-voltage high-current electrical power deliverty. Therefore, it is obvious that a dedicated power interface is necessary to adapt and fix voltage and current levels accordingly to the application requirements. In our case, the power conversion will be done by a high-frequency-transformer-based DC/DC converter. The use of a high frequency transformer allows obtaining significant output voltage ratio (approximately 12 in our case), high efficiency, reduce compactness of used elements and limited semi-conductors losses.


2011 ◽  
Vol 267 ◽  
pp. 98-103
Author(s):  
Chi Pin Wei ◽  
Zhao Lin Li ◽  
Hao Liu ◽  
Zhi Xiang Chen

Embedded systems with digital signal processor (DSP) become more and more popular for the increasing requirement of supercomputing these days. Efficient development of DSP serials used in embedded systems shortens the embedded system R&D cycle. Functional verification is one of the most complex and expensive tasks during DSP serials design process. A random test platform which is urged for DSP serials verification is proposed in this paper. The platform can automatically generate the random test program. The platform also realized the recording and checking of simulation results, which make the verification more effective. In order to improve the efficiency of DSP verification, a testing experience library has been generated through the testing procedure. This platform can be transplanted for different DSP models easily by updating few modules. According to the verification results, this platform has satisfactory coverage of DSP models.


2021 ◽  
Vol 31 (04) ◽  
pp. 2130012
Author(s):  
Yue Deng ◽  
Yuxia Li

In this paper, a new memristor model and a new memcapacitor model are proposed. Based on the two models, a simple chaotic circuit is constructed. Due to the special characteristics of the memristor and memcapacitor, the proposed circuit has two-dimensional normally hyperbolic manifolds of equilibria, and nonparametric bifurcation can occur when the conditions supporting the normal hyperbolicity of such manifolds are not satisfied. By adding a nonlinear controller to the proposed circuit, an anti-controlled system is realized, which has hyperchaotic dynamic behaviors under some suitable control parameters. The stability of equilibrium points and dynamic properties of the original system and the anti-controlled system are explored by Lyapunov exponents, bifurcation diagrams and so on. Furthermore, the anti-controlled system is applied to design a random sequence generator on digital signal processor platform.


2014 ◽  
Vol 62 (3) ◽  
pp. 589-594 ◽  
Author(s):  
T. Marciniak ◽  
R. Weychan ◽  
A. Stankiewicz ◽  
A. Dąbrowski

Abstract This paper presents an analysis of issues related to the fixed-point implementation of a speech signal applied to biometric purposes. For preparing the system for automatic speaker identification and for experimental tests we have used the Matlab computing environment and the development software for Texas Instruments digital signal processors, namely the Code Composer Studio (CCS). The tested speech signals have been processed with the TMS320C5515 processor. The paper examines limitations associated with operation of the realized embedded system, demonstrates advantages and disadvantages of the technique of automatic software conversion from Matlab to the CCS and shows the impact of the fixed-point representation on the speech identification effectiveness.


2019 ◽  
Vol 16 (6) ◽  
pp. 782-790
Author(s):  
Mohsen Karimi ◽  
Mohammad Pichan ◽  
Mehdi Sadri ◽  
Seyed Morteza Seyedjafari

Purpose This paper aims to investigate an improved control method and digital signal processor-based (DSP-based) digital implementation of three-phase standalone inverter. The proposed method is performance developed of the proportional-resonant controller (PRC) with harmonic injection technique, aiming to improve load voltages quality under different loads, especially nonlinear loads. The advanced proposed multi-loop controller is consisted of current harmonic loops for suppressing odd harmonic, which are analyzed in discrete-time domain. Besides, the voltage loop is also used to compensate the output capacitor voltage. Design/methodology/approach The proposed method can effectively enlarge output voltage stability with low total harmonics distortion and improve the dynamic transient response. The other advantage of the proposed PRC is the injection of the selective harmonic without any additional calculation compensator. Findings The method is given the opportunity to be controlled exactly all harmful outputs with high-quality voltage referenced of the standalone inverter. The proposed method is implemented using a DSP processor (TMS320F28335) and is verified on the 10 kVA three-phase standalone inverter prototype. Originality/value The proposed method is performance developed of the PRC with harmonic injection technique, aiming to improve load voltages quality under different loads, especially nonlinear loads.


2014 ◽  
Vol 886 ◽  
pp. 556-559 ◽  
Author(s):  
Su Hua Chen ◽  
Zhi Meng Shu ◽  
Xu Fang

In order to improve high performance and low power of image processing embedded system, A high-efficient image processing embedded system which is based on the field programmable gate array and high-speed digital signal processor in this paper. In the whole system, A novel data transmission structure with a dual-port RAM which is divided into two halves, is applied to buff the high-speed real-time image data by Ping-pong technique. Because all work in the system is divided between the FPGA and DSP in the form of the pipelined, it is 25% higher than the processing system based on the single DSP in performance.


Author(s):  
A. E. Abdelkareem ◽  
Saad Mohammed Saleh ◽  
Ammar D. Jasim

<p>In this paper, developing high performance software for demanding real-time embedded systems is proposed. This software-based design will enable the software engineers and system architects in emerging technology areas like 5G Wireless and Software Defined Networking (SDN) to build their algorithms. An ADSP-21364 floating point SHARC Digital Signal Processor (DSP) running at 333 MHz is adopted as a platform for an embedded system. To evaluate the proposed embedded system, an implementation of frame, symbol and carrier phase synchronization is presented as an application. Its performance is investigated with an on line Quadrature Phase Shift keying (QPSK) receiver. Obtained results show that the designed software is implemented successfully based on the SHARC DSP which can utilized efficiently for such algorithms. In addition, it is proven that the proposed embedded system is pragmatic and capable of dealing with the memory constraints and critical time issue due to a long length interleaved coded data utilized for channel coding.</p>


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