scholarly journals Multiscale Modeling for Application-Oriented Optimization of Resistive Random-Access Memory

Materials ◽  
2019 ◽  
Vol 12 (21) ◽  
pp. 3461 ◽  
Author(s):  
Paolo La Torraca ◽  
Francesco Maria Puglisi ◽  
Andrea Padovani ◽  
Luca Larcher

Memristor-based neuromorphic systems have been proposed as a promising alternative to von Neumann computing architectures, which are currently challenged by the ever-increasing computational power required by modern artificial intelligence (AI) algorithms. The design and optimization of memristive devices for specific AI applications is thus of paramount importance, but still extremely complex, as many different physical mechanisms and their interactions have to be accounted for, which are, in many cases, not fully understood. The high complexity of the physical mechanisms involved and their partial comprehension are currently hampering the development of memristive devices and preventing their optimization. In this work, we tackle the application-oriented optimization of Resistive Random-Access Memory (RRAM) devices using a multiscale modeling platform. The considered platform includes all the involved physical mechanisms (i.e., charge transport and trapping, and ion generation, diffusion, and recombination) and accounts for the 3D electric and temperature field in the device. Thanks to its multiscale nature, the modeling platform allows RRAM devices to be simulated and the microscopic physical mechanisms involved to be investigated, the device performance to be connected to the material’s microscopic properties and geometries, the device electrical characteristics to be predicted, the effect of the forming conditions (i.e., temperature, compliance current, and voltage stress) on the device’s performance and variability to be evaluated, the analog resistance switching to be optimized, and the device’s reliability and failure causes to be investigated. The discussion of the presented simulation results provides useful insights for supporting the application-oriented optimization of RRAM technology according to specific AI applications, for the implementation of either non-volatile memories, deep neural networks, or spiking neural networks.

2016 ◽  
Vol 1 (6) ◽  
Author(s):  
Amit Prakash ◽  
Hyunsang Hwang

Abstract Multilevel per cell (MLC) storage in resistive random access memory (ReRAM) is attractive in achieving high-density and low-cost memory and will be required in future. In this chapter, MLC storage and resistance variability and reliability of multilevel in ReRAM are discussed. Different MLC operation schemes with their physical mechanisms and a comprehensive analysis of resistance variability have been provided. Various factors that can induce variability and their effect on the resistance margin between the multiple resistance levels are assessed. The reliability characteristics and the impact on MLC storage have also been assessed.


2019 ◽  
Vol 10 (1) ◽  
Author(s):  
Maheswari Sivan ◽  
Yida Li ◽  
Hasita Veluri ◽  
Yunshan Zhao ◽  
Baoshan Tang ◽  
...  

Abstract3D monolithic integration of logic and memory has been the most sought after solution to surpass the Von Neumann bottleneck, for which a low-temperature processed material system becomes inevitable. Two-dimensional materials, with their excellent electrical properties and low thermal budget are potential candidates. Here, we demonstrate a low-temperature hybrid co-integration of one-transistor-one-resistor memory cell, comprising a surface functionalized 2D WSe2p-FET, with a solution-processed WSe2 Resistive Random Access Memory. The employed plasma oxidation technique results in a low Schottky barrier height of 25 meV with a mobility of 230 cm2 V−1 s−1, leading to a 100x performance enhanced WSe2p-FET, while the defective WSe2 Resistive Random Access Memory exhibits a switching energy of 2.6 pJ per bit. Furthermore, guided by our device-circuit modelling, we propose vertically stacked channel FETs for high-density sub-0.01 μm2 memory cells, offering a new beyond-Si solution to enable 3-D embedded memories for future computing systems.


2020 ◽  
Vol 20 (8) ◽  
pp. 4735-4739 ◽  
Author(s):  
Chae Soo Kim ◽  
Taehyung Kim ◽  
Kyung Kyu Min ◽  
Sungjun Kim ◽  
Byung-Gook Park

In this paper, we pose reverse leakage current issue which occurs when resistive random access memory (RRAM) is used as synapse for spiking neural networks (SNNs). To prevent this problem, 1 diode-1 RRAM (1D1R) synapse is suggested and simulated to examine their current rectifying chracteristics, Furthermore, high density of 1 K 3D 1D1R synapse array structure and its process flow are proposed.


2020 ◽  
Vol 12 (2) ◽  
pp. 02008-1-02008-4
Author(s):  
Pramod J. Patil ◽  
◽  
Namita A. Ahir ◽  
Suhas Yadav ◽  
Chetan C. Revadekar ◽  
...  

Nanomaterials ◽  
2021 ◽  
Vol 11 (6) ◽  
pp. 1401
Author(s):  
Te Jui Yen ◽  
Albert Chin ◽  
Vladimir Gritsenko

Large device variation is a fundamental challenge for resistive random access memory (RRAM) array circuit. Improved device-to-device distributions of set and reset voltages in a SiNx RRAM device is realized via arsenic ion (As+) implantation. Besides, the As+-implanted SiNx RRAM device exhibits much tighter cycle-to-cycle distribution than the nonimplanted device. The As+-implanted SiNx device further exhibits excellent performance, which shows high stability and a large 1.73 × 103 resistance window at 85 °C retention for 104 s, and a large 103 resistance window after 105 cycles of the pulsed endurance test. The current–voltage characteristics of high- and low-resistance states were both analyzed as space-charge-limited conduction mechanism. From the simulated defect distribution in the SiNx layer, a microscopic model was established, and the formation and rupture of defect-conductive paths were proposed for the resistance switching behavior. Therefore, the reason for such high device performance can be attributed to the sufficient defects created by As+ implantation that leads to low forming and operation power.


2021 ◽  
Vol 23 (10) ◽  
pp. 5975-5983
Author(s):  
Jie Hou ◽  
Rui Guo ◽  
Jie Su ◽  
Yawei Du ◽  
Zhenhua Lin ◽  
...  

In this study, at least three kinds of VOs and conductive filaments with low resistance states and forming and set voltages are found for β-Ga2O3 memory. This suggests the great potential of β-Ga2O3 memory for multilevel storage application.


2008 ◽  
Vol 93 (22) ◽  
pp. 223505 ◽  
Author(s):  
Jung Won Seo ◽  
Jae-Woo Park ◽  
Keong Su Lim ◽  
Ji-Hwan Yang ◽  
Sang Jung Kang

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