scholarly journals A Thermopile Detector Based on Micro-Bridges for Heat Transfer

Micromachines ◽  
2021 ◽  
Vol 12 (12) ◽  
pp. 1554
Author(s):  
Na Zhou ◽  
Xuefeng Ding ◽  
Hongbo Li ◽  
Yue Ni ◽  
Yonglong Pu ◽  
...  

A thermopile detector with their thermocouples distributed in micro-bridges is designed and investigated in this work. The thermopile detector consists of 16 pairs of n-poly-Si/p-poly-Si thermocouples, which are fabricated using a low-cost, high-throughput CMOS process. The micro-bridges are realized by forming micro trenches at the front side first and then releasing the silicon substrate at the back side. Compared with a thermopile device using a continuous membrane, the micro-bridge-based one can achieve an improvement of the output voltage by 13.8% due to a higher temperature difference between the hot and cold junctions as there is a decrease in thermal conduction loss in the partially hollowed structure. This technique provides an effective way for developing high-performance thermopile detectors and other thermal devices.

Micromachines ◽  
2020 ◽  
Vol 11 (2) ◽  
pp. 205
Author(s):  
Dan Xue ◽  
Jiachou Wang ◽  
Xinxin Li

In this paper, we present a novel thermoresistive gas flow sensor with a high-yield and low-cost volume production by using front-side microfabricated technology. To best improve the thermal resistance, a micro-air-trench between the heater and the thermistors was opened to minimize the heat loss from the heater to the silicon substrate. Two types of gas flow sensors were designed with the optimal thermal-insulation configuration and fabricated by a single-wafer-based single-side process in (111) wafers, where the type A sensor has two thermistors while the type B sensor has four. Chip dimensions of both sensors are as small as 0.7 mm × 0.7 mm and the sensors achieve a short response time of 1.5 ms. Furthermore, without using any amplification, the normalized sensitivity of type A and type B sensors is 1.9 mV/(SLM)/mW and 3.9 mV/(SLM)/mW for nitrogen gas flow and the minimum detectable flow rate is estimated at about 0.53 and 0.26 standard cubic centimeter per minute (sccm), respectively.


2006 ◽  
Vol 969 ◽  
Author(s):  
Gereon Vogtmeier ◽  
Christian Drabe ◽  
Ralf Dorscheid ◽  
Roger Steadman ◽  
Dr. Alexander Wolter

AbstractThe foremost driver for the development of fully CMOS compatible Through Wafer Interconnects (TWIs) is the need of very large photodiode arrays for detectors, e.g. in computed tomography applications. The front to back-side contact allows the four-side buttable chip placement of the already large chips (20mm × 22mm2). The TWI technology allows an interconnection for chips up to 280μm thickness. This technique does not require any via opening at the font side, thus enabling a metal signal routing on the active side, on top of the interconnection. The application specific optical sensitive front-side of the chip is fully accessible. The production process is separated into three main steps. The first step is the implementation of the special TWI geometry into the CMOS substrate. Depending on the electrical and geometrical requirements of the circuit, different TWI structures are built with deep trenches (up to 280μm), which are passivated and filled with doped poly-silicon. The technologies used in this process, such as DRIE-etching, oxidation and low pressure CVD, are standard CMOS compatible processes. The use of poly-silicon prevents from achieving very low resistivity interconnections but allows the use of all CMOS process steps for an imager production (no temperature limitation – compared to other TWI process flows). The second step is the standard CMOS processing on the substrate already including the TWIs. The third step is a low temperature back-side process starting with wafer thinning down to 280μm or less to open the implemented TWI structure from the back-side. The thickness may be selected depending on the target application. A modified under ball metallization (UBM) process, which could include also re-routing of signals on the back-side, concludes the process flow until the solder ball placement, or similar bond connections.The special process flow opens a variety of applications which benefit from the full CMOS compatible processing and the accessible front-side.


2018 ◽  
Vol 7 (4.10) ◽  
pp. 278 ◽  
Author(s):  
Bhavani S ◽  
Shanmugan. S ◽  
Selvaraju P

In this work has been made to predict the effect of several parameters on the productivity to a system by expending fuzzy set technique. A solar cooker has been developed low cost and critically high efficiency produce in Vel Tech Multitech Engineering College at Chennai, Tamilnadu, India. Dissects in thermal performance of cooking system have been produced heat transfer follow in fuzzy logic techniques (Low, Medium, and High). The thermal effect of factor should be developed in fuzzy logic for the system. They should have groups of heat transfer produced in fuzzy logic controller for solar cooker system which had been implemented of system performance discussed. It is to study have induced to give the shortly time for the enhancement of the box solar cooker production.  


Author(s):  
Shankar Krishnan ◽  
Steve Leith ◽  
Terry Hendricks

Gas and air-side heat transfer is ubiquitous throughout many technological sectors, including HVAC (heating, ventilating, and air conditioning) systems, thermo-electric power generators and coolers, renewable energy, electronics and vehicle cooling, and forced-draft cooling in the petrochemical and power industries. The poor thermal conductivity and low heat capacity of air causes air-side heat transfer to typically dominate heat transfer resistance even with the use of extended area structures. In this paper, we report design, analysis, cost modeling, fabrication, and performance characterization of micro-honeycombs for gas-side heat transfer augmentation in thermoelectric (TE) cooling and power systems. Semi-empirical model aided by experimental validation was undertaken to characterize fluid flow and heat transfer parameters. We explored a variety of polygonal shapes to optimize the duct shape for air-side heat transfer enhancement. Predictions using rectangular micro-honeycomb heat exchangers, among other polygonal shapes, suggest that these classes of geometries are able to provide augmented heat transfer performance in high-temperature energy recovery streams and low-temperature cooling streams. Based on insight gained from theoretical models, rectangular micro-honeycomb heat exchangers that can deliver high performance were fabricated and tested. High- and low-cost manufacturing prototype designs with different thermal performance expectations were fabricated to explore the cost-performance design domain. Simple metrics were developed to correlate heat transfer performance with heat exchanger cost and weight and define optimum design points. The merits of the proposed air-side heat transfer augmentation approach are also discussed within the context of relevant thermoelectric power and cooling systems.


2019 ◽  
Vol 15 (2) ◽  
pp. 113-118
Author(s):  
Agata Romanova ◽  
Vaidotas Barzdenas

AbstractThe work reports on the design and performance of a low-noise low-cost CMOS transimpedance amplifier (TIA). The proposed circuit shall be employed in optical time-domain reflectometers and is implemented using an affordable 0.18 µm 1.8 V CMOS process. The approach preserves the benefits of a classical feedback structure while addressing the noise problem of conventional feed-forward and resistive feedback architectures via the usage of noise-efficient capacitive feedback. Circuit-level modifications are proposed to mitigate the voltage headroom and DC current issues. The suggested design achieves a total gain of 82 dBΩ (79 dBΩ after the output buffer) within the bandwidth of 1.2 GHz while operating with a total input capacitance of 0.7 pF. The simulated average input-referred noise current density is below 1.8 pA/sqrt(Hz) with the power consumption of the complete amplifier including the output buffer being 21 mW.


Volume 4 ◽  
2004 ◽  
Author(s):  
M. J. Morales ◽  
S. A. Sherif

The purpose of this study is to investigate how the heat exchanger inventory allocation plays a role in maximizing the thermal performance of a two-stage refrigeration system with two evaporators. First, the system is modeled as a Carnot refrigerator and a particular heat transfer parameter is kept constant as the heat exchanger allocation parameter is allowed to vary. The value of the heat exchanger allocation parameter corresponding to the maximum coefficient of performance (COP) is noted. The results are compared to those of a non-Carnot refrigerator with isentropic and non-isentropic compression. It is found that the Carnot refrigerator can be used to predict the value of the heat exchanger allocation parameter where the maximum COP occurs for a non-Carnot refrigerator. In order to improve the accuracy of that prediction, the predicted value of the heat exchanger allocation parameter has to be inputted into the set of equations used for the non-Carnot refrigerator. This study is useful in designing a low cost, high-performance refrigeration system.


Author(s):  
Ed Walsh ◽  
Ronan Grimes ◽  
Patrick Walsh ◽  
Jason Stafford

The need for low profile, sustainable thermal management solutions is becoming a critical need in electronics from consumer products to server cabinets. This work presents a FINLESS thermal management solution that utilises fluidic structures generated within it to enhance the heat transfer performance. The FINLESS thermal management solution can be manufactured to have a height of ∼5mm or even less when using low profile motors. Particle Image Velocimetry (PIV) combined with Infra-Red (IR) imaging techniques are used to explain the underlying flow physics that results in increased heat transfer rates compared to typical laminar flows. It is found that the local heat transfer coefficients in the finless design are up to 300% greater than those achieved at the same Reynolds number using conventional boundary layer theory. The additional benefits in terms of sustainability of the approach are also highlighted.


2016 ◽  
Vol 25 (11) ◽  
pp. 1650140 ◽  
Author(s):  
Ling-Feng Shi ◽  
Zhen-Bo Shi ◽  
Sen Chen ◽  
Jian-Hui Xun

Primary-side controlled pulse-width modulation (PWM) flyback converter has been widely used in low-power and low-voltage products for its simple structure and low cost. This paper presents a novel output voltage sampling circuit which considers the influence of the rectifier diode current on the output voltage sampling. The output voltage sampling circuit samples the output voltage at 85% of the secondary inductance discharge time [Formula: see text] of last cycle, which improves the accuracy of the output voltage sampling circuit. Besides, the circuit can also sample the secondary inductance discharge time [Formula: see text]. Finally, a chip has been fabricated in 0.6[Formula: see text][Formula: see text]m complementary metal-oxide semiconductor (CMOS) process, which is used in the presented output voltage sampling circuit in its internal circuit to simple output voltage and achieve constant output voltage.


2021 ◽  
Vol 2021 ◽  
pp. 1-22
Author(s):  
Paul Miresan ◽  
Marius Neag ◽  
Marina Topa ◽  
Istvan Kovacs ◽  
Laurentiu Varzaru

This paper presents a novel topology for multipurpose drivers for MEMS sensors and actuators, suitable for integration in low-cost high-voltage (HV) CMOS processes, without a triple well. The driver output voltage, V MEMS , can be programmed over a wide, symmetrical range of positive and negative values, with the maximum output voltage being limited only by the maximum drain-source voltage that the HV transistors can handle. The driver is also able to short its output to the ground line and to leave it floating. It comprises generators for large positive and negative voltages followed by an LDO for each polarity that ensures that V MEMS has a well-controlled level and a very low ripple. The LDOs also help implement the grounded- and floating-output operating modes. Most of the required circuitry is integrated within a HV CMOS ASIC: the drivers for the large voltage generators, the error amplifiers of the LDOs, the DAC used to program the V MEMS level, and their support circuits. Thus, only the power stages of the large voltage generators, the pass transistors of the LDOs and two resistors for the LDO feedback network are discrete. A suitable configuration was devised for the latter that allows for the external resistor network to be shared by the two LDOs and prevents negative voltages from developing at the ASIC pins. Two circuit implementations of the proposed topology, designed in a low-cost 0.18 μm HV CMOS process, are presented in some detail. Simulation results demonstrate that they realize the required operating modes and provide V MEMS voltages programmable with steps of 100 mV or 200 mV, between -20 V and +20 V or between −45 V and +45 V, respectively. The output voltage ripple is relatively small, just 3.4 mVpkpk for the first implementation and 17 mVpkpk for the second. Therefore, both circuits are suitable for biasing and controlling a wide range of MEMS devices, including MEMS mirrors used in applications such as endoscopic optical coherence tomography.


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