scholarly journals Two-Capacitor Direct Interface Circuit for Resistive Sensor Measurements

Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1524
Author(s):  
José A. Hidalgo-López ◽  
Óscar Oballe-Peinado ◽  
Julián Castellanos-Ramos ◽  
José A. Sánchez-Durán
Keyword(s):  
Digital Device ◽  
Interface Circuits ◽  
Capacitor Discharge ◽  
Interface Circuit ◽  
Analog To Digital ◽  
Resistive Sensor ◽  
High Measurement ◽  
Field Programmable ◽  
Small Resistance ◽  
Digital Measurements

Direct interface circuits (DICs) avoid the need for signal conditioning circuits and analog-to-digital converters (ADCs) to obtain digital measurements of resistive sensors using only a few passive elements. However, such simple hardware can lead to quantization errors when measuring small resistance values as well as high measurement times and uncertainties for high resistances. Different solutions to some of these problems have been presented in the literature over recent years, although the increased uncertainty in measurements at higher resistance values is a problem that has remained unaddressed. This article presents an economical hardware solution that only requires an extra capacitor to reduce this problem. The circuit is implemented with a field-programmable gate array (FPGA) as a programmable digital device. The new proposal significantly reduces the uncertainty in the time measurements. As a result, the high resistance errors decreased by up to 90%. The circuit requires three capacitor discharge cycles, as is needed in a classic DIC. Therefore, the time to estimate resistance increases slightly, between 2.7% and 4.6%.

scholarly journals Fast Calibration Methods for Resistive Sensor Readout Based on Direct Interface Circuits

Sensors ◽  
2019 ◽  
Vol 19 (18) ◽  
pp. 3871 ◽  
Author(s):  
Hidalgo-López ◽  
Botín-Córdoba ◽  
Sánchez-Durán ◽  
Oballe-Peinado
Keyword(s):  
Digital Information ◽  
Discharge Time ◽  
Digital Device ◽  
Interface Circuits ◽  
Simple Method ◽  
Interface Circuit ◽  
Calibration Methods ◽  
Resistive Sensor ◽  
Field Programmable ◽  
Conversion Time

A simple method to measure the resistance of a sensor and convert it into digital information in a programmable digital device is by using a direct interface circuit. This type of circuit deduces the value of the resistor based on the discharge time through it for a capacitor of a known value. Moreover, the discharge times of this capacitor should be measured through one or two resistors with known values in order to ensure that the estimate is not dependent on certain parameters that change with time, temperature, or aging. This can slow down the conversion speed, especially for high resistance values. To overcome this problem, we propose a modified process in which part of the discharge, which was previously performed through the resistive sensor only, is only conducted with the smallest calibration resistor. Two variants of this operation method, which differ in the reduction of the total time necessary for evaluation and in the uncertainty of the measurements, are presented. Experiments carried out with a field programmable gate array (FPGA); using these methodologies achieved reductions in the resistance conversion time of up to 55%. These reductions may imply an increase in the uncertainty of the measurements; however, the tests carried out show that with a suitable choice of parameters, the increases in uncertainty, and therefore errors, may be negligible compared to the direct interface circuits described in the literature.

scholarly journals MEMS Seismic Sensor with FPAA Based Interface Circuit for Frequency-Drift Compensation using ANN

2018 ◽  
Vol 6 (2) ◽  
pp. 120
Author(s):  
Ramesh Pawase ◽  
N.P. Futane
Keyword(s):  
Frequency Drift ◽  
Ann Model ◽  
Interface Circuits ◽  
Interface Circuit ◽  
Analog To Digital ◽  
Significant Power ◽  
Development Platform ◽  
Analog To Digital Conversion ◽  
Field Programmable ◽  
Minimum Block

<p>Electrochemical MEMS seismic sensor is limited by its non-ideality of frequency dependent characteristics hence interface circuits for compensation is necessary. The conventional compensation circuits are limited by high power consumption, bulky external hardware circuitry. In these methods digital circuits are also limited by inherent analog to digital conversion and vice versa which consumes significant power, acquires more size and limits speed.  A Field programmable analog array (FPAA) overcomes these limitations and gives fast, simple and user friendly development platform with less development speed comparable to ASIC. Recently FPAA becoming popular for rapid prototyping. The proposed system presents FPAA (Anadigm AN231E04) based hardware implementation of ANN model. Using this FPAA based compensation circuit, the error in frequency drift have been minimized in the range of 3.68% to about 0.64% as compared to ANN simulated results in the range of 23.07% to 0.99 %. This single neuron consumes of power of 206.62 mW. and has minimum block wise resource utilization.  The proposed hardware uses all analog blocks which remove the requirement of ADC and DAC reducing significant power and size of interface circuit. This work gives the SMART MEMS seismic sensor with reliable output and ANN based intelligent interface circuit implemented in FPAA hardware.<strong></strong></p>

scholarly journals Reducing Measurement Time in Direct Interface Circuits for Resistive Sensor Readout

Sensors ◽  
2020 ◽  
Vol 20 (9) ◽  
pp. 2596
Author(s):  
José A. Hidalgo-López ◽  
José A. Sánchez-Durán ◽  
Óscar Oballe-Peinado
Keyword(s):  
Estimation Method ◽  
Calibration Method ◽  
Digital Conversion ◽  
Digital Device ◽  
Interface Circuits ◽  
Analog To Digital ◽  
Slowing Down ◽  
Resistive Sensor ◽  
Relative Errors ◽  
Capacitor Charge

Direct Interface Circuits (DICs) carry out resistive sensor readings using a resistance-to-time-to-digital conversion without the need for analog-to-digital converters. The main advantage of this approach is the simplicity involved in designing a DIC, which only requires some additional resistors and a capacitor in order to perform the conversion. The main drawback is the time needed for this conversion, which is given by the sum of up to three capacitor charge times and their associated discharge times. This article presents a modification of the most widely used estimation method in a resistive DIC, which is known as the Two-Point Calibration Method (TPCM), in which a single additional programmable digital device pin in the DIC and one extra measurement in each discharge cycle, made without slowing down the cycle, allow charge times to be reduced more than 20-fold to values around 2 µs. The new method designed to achieve this reduction only penalizes relative errors with a small increase of between 0.2% and 0.3% for most values in the tested resistance range.

Signal Processing of Giant Magnetostritive Force Sensors

2013 ◽  
Vol 834-836 ◽  
pp. 988-993
Author(s):  
Rong Ge Yan ◽  
Li Hua Zhu ◽  
Qing Xin Yang
Keyword(s):  
Signal Processing ◽  
Processing System ◽  
Force Sensor ◽  
Practical Application ◽  
Interface Circuits ◽  
Signal Processing System ◽  
Interface Circuit ◽  
Analog To Digital ◽  
Keyboard Input ◽  
Hardware System

Based on the analysis of the principle of giant magnetostrictive force sensor, the signal processing system of the sensor has been designed. First, this paper designs manual and automatic working mode for the giant magnetostrictive force sensor. Using SCM as a micro-controller, its peripheral interface circuits hardware system have been designed, including signal amplification circuit, analog to digital (A/D) conversion interface circuit, LED display interface circuit, determinant keyboard input interface circuit and imposing force control circuit. This system is able to display the numerical value of the imposed force. The software of the whole system is designed. Experiments are conducted to show that the signal processing system works well, which is important to practical application of the giant magnetostritive force sensor.

scholarly journals Optimization of spaceflight millimeter-wave impedance matching networks using laser trimming

2021 ◽  
pp. 1-7
Author(s):  
K. Parow-Souchon ◽  
D. Cuadrado-Calle ◽  
S. Rea ◽  
M. Henry ◽  
M. Merritt ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Millimeter Wave ◽  
Impedance Matching ◽  
Wave Impedance ◽  
Low Noise ◽  
Device Performance ◽  
Interface Circuits ◽  
Interface Circuit ◽  
Noise Amplifier

Abstract Realizing packaged state-of-the-art performance of monolithic microwave integrated circuits (MMICs) operating at millimeter wavelengths presents significant challenges in terms of electrical interface circuitry and physical construction. For instance, even with the aid of modern electromagnetic simulation tools, modeling the interaction between the MMIC and its package embedding circuit can lack the necessary precision to achieve optimum device performance. Physical implementation also introduces inaccuracies and requires iterative interface component substitution that can produce variable results, is invasive and risks damaging the MMIC. This paper describes a novel method for in situ optimization of packaged millimeter-wave devices using a pulsed ultraviolet laser to remove pre-selected areas of interface circuit metallization. The method was successfully demonstrated through the optimization of a 183 GHz low noise amplifier destined for use on the MetOp-SG meteorological satellite series. An improvement in amplifier output return loss from an average of 12.9 dB to 22.7 dB was achieved across an operational frequency range of 175–191 GHz and the improved circuit reproduced. We believe that our in situ tuning technique can be applied more widely to planar millimeter-wave interface circuits that are critical in achieving optimum device performance.

scholarly journals SYNTHESIS AND FPGA–IMPLEMENTATION BASED NEURAL TECHNIQUE OF A NONLINEAR ADC MODEL

2014 ◽  
pp. 27-33
Author(s):  
Mounir Bouhedda ◽  
Mokhtar Attari
Keyword(s):  
Integrated Circuit ◽  
Field Programmable Gate Array ◽  
High Speed ◽  
Hardware Description Language ◽  
Description Language ◽  
Analog To Digital ◽  
Field Programmable ◽  
Hardware Description ◽  
Nonlinear Analog ◽  
Very High

The aim of this paper is to introduce a new architecture using Artificial Neural Networks (ANN) in designing a 6-bit nonlinear Analog to Digital Converter (ADC). A study was conducted to synthesise an optimal ANN in view to FPGA (Field Programmable Gate Array) implementation using Very High-speed Integrated Circuit Hardware Description Language (VHDL). Simulation and tests results are carried out to show the efficiency of the designed ANN.

scholarly journals A Programmable Receiver for Communication Systems and Its Application to Impulse Radio

2009 ◽  
Vol 2009 ◽  
pp. 1-5 ◽  
Author(s):  
Roman Merz ◽  
Cyril Botteron ◽  
Frédéric Chastellain ◽  
Pierre-André Farine
Keyword(s):  
Field Programmable Gate Array ◽  
Communication Systems ◽  
Indoor Environment ◽  
Impulse Radio ◽  
Ultra Wideband ◽  
System Architectures ◽  
Analog To Digital ◽  
Field Programmable ◽  
Signal Processing Algorithms ◽  
Processing Algorithms

The design of a programmable receiver for an ultra wideband (UWB) communication is presented. The receiver is using a fast analog to digital converter (ADC) and a field programmable gate array (FPGA) allowing a rapid performance evaluation for various system architectures and signal processing algorithms. To demonstrate the performance and the versatility of the receiver, a simple communication system and a localization system are implemented. The accuracy of the latter is presented for an indoor environment.

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