Frequency Stabilization and EMI Noise Reduction of COT Method Ripple-Controlled Switching Converters with Output Voltage Ripple Cancellation

2020 ◽  
Vol 38 ◽  
pp. 130-142
Author(s):  
Yasunori Kobori ◽  
Yi Fei Sun ◽  
Minh Tri Tran ◽  
Anna Kuwana ◽  
Haruo Kobayashi
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Peak Level ◽  
Operating Frequency ◽  
Duty Ratio ◽  
Switching Converters ◽  
Clock Frequency ◽  
Voltage Ripple ◽  
Ripple Cancellation ◽  
Emi Reduction

This paper proposes a new EMI reduction and automatic ripple cancellation technique about the ripple-controlled converter with the ripple injection and Constant-On Time (COT) method. The ripple-controlled converters have no stable clock and it is difficult to reduce the EMI noise by shaking the operating frequency. The new method of EMI reduction is that the COT pulse width is modulated by the triangular signal so that the operating frequency is modulated and the spectrum peak level of the clock frequency is greatly reduced. But the output voltage ripple is much increased because of the change of the duty ratio of the operating frequency. The increaced ripple is canceled by adding the modulation signal to the ripple injection circuit. Moreover stabiliztion of the operating frequency on Discontinuous Conduction Mode (DCM) is reported. The operating frequency falls down on DCM mode in the COT converters. To stabilize the operating frequency, cheking the operating period is fedback to control the COT pulse width

EMI Reduction of PFC Rectifier and LLC Converter with Automatic Output Ripple Improvement

2020 ◽  
Vol 38 ◽  
pp. 103-117
Author(s):  
Yasunori Kobori ◽  
Noriyuki Oiwa ◽  
Shogo Katayama ◽  
Ahmad Bustoni ◽  
Yi Fei Sun ◽  
...  
Keyword(s):  
Noise Reduction ◽  
Power Factor ◽  
Output Voltage ◽  
Clock Pulse ◽  
Operating Frequency ◽  
Duty Ratio ◽  
Clock Frequency ◽  
Forward Converter ◽  
Electro Magnetic ◽  
Emi Reduction

This paper proposes the method of the Electro-Magnetic Interference (EMI) noise reduction of the AC-DC rectifiers and the DC-DC converters with the insulated transformers. For the Power Factor Correction (PFC) rectifier, the power factor is the most important item, but the EMI noise emitted from the clock pulse is not remarked. For the DC-DC converters such as the forward converter, the efficiency is the most important. We have focused on the EMI noise reduction for the PFC rectifier and insulated DC-DC converters with the frequency modulation of the clock pulses. First, the spectrum level of the clock pulse is introduced to be much reduced by shaking the clock frequency for the PFC rectifier and the forward converter. Next, we have investigated the EMI reduction of the LLC converter whose operating frequency varies to make the output voltage stable. It is difficult to modify the operating frequency to reduce the EMI noise. We have investigated to reduce the EMI noise by shaking the duty ratio of the resonant signals for the LLC converter. In this case, the output voltage ripple is increased by much EMI noise reduction. Finally, the technology to stabilize the increased ripple is introduced.

EMI Noise Reduction of DC-DC Switching Converters with Automatic Output Ripple Cancellation

2020 ◽  
Vol 38 ◽  
pp. 157-170
Author(s):  
Yasunori Kobori ◽  
Yi Fei Sun ◽  
Minh Tri Tran ◽  
Anna Kuwana ◽  
Haruo Kobayashi
Keyword(s):  
Noise Reduction ◽  
Output Voltage ◽  
Current Mode ◽  
Buck Converter ◽  
Operating Frequency ◽  
Switching Converters ◽  
Stable Level ◽  
Voltage Mode ◽  
Voltage Ripple ◽  
Ripple Cancellation

This paper proposes new EMI reduction technologies and automatic output voltage ripple cancellation method for the PWM buck converter with voltage-mode or current-mode and the ripple-controlled converters. Genenrally, modfying the clock frequeny is effective to reduce the EMI noise, but it may increase the output ripple substantially. We have developed techniques to cancel the increased ripple by modifying the slope of the saw-tooth signal or current of the ripple injection circuit. The EMI spectrum of the operating frequency is reduced by more than 15dB and the modified large ripple is canceled to the stable level.

scholarly journals Algorithim to control output voltage and reduce the ripple of input current in quasi switched boost inverter

2021 ◽  
Vol 4 (2) ◽  
pp. first
Author(s):  
Xuan-Vinh Le ◽  
Duc-Minh Nguyen ◽  
Viet-Anh Truong ◽  
Thanh-Hai Quach
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Short Circuit ◽  
Modulation Index ◽  
Duty Ratio ◽  
Electrical Systems ◽  
Boost Factor ◽  
Control Output ◽  
Current Ripple

In recent years, the quasi -switched boost inverter uses widely in electrical systems. This paper proposes a method to control the AC output voltage and reduce the current ripple of the booster inductor in the quasi-switched boost inverter (QSBI). The proposed technique base on carrier pulse width modulation with two triangles with phase shifts 90◦. This technique uses the offset function to expand the modulation index and the algorithm for output voltage stabilization based on the adjustment of the boost ratio. The modulation index expansion will reduce the stress voltage on the switches by an average of 16.5% under the simulated conditions. The boost factor base on the short circuit time on the DC / DC booster and the inverter on the zero vectors. So, the duty ratio (of the boost DC / DC) can reduce by the short-circuit pulses that insert in the position of zero vectors, so the inverter is responsible for both boosting and inverting. The combination helps to reduce the current ripple on the boost inductor. Besides that, reducing the short-circuit ratio of DC / DC booster will also reduce the capacity of the booster switch and thereby reduce the production cost. The analysis clarifies the proposed technique. Simulations and experiments evaluate the proposed method.

Fast-Transient-Response Low-Voltage Integrated, Interleaved DC–DC Converter for Implantable Devices

2019 ◽  
Vol 29 (01) ◽  
pp. 2050013
Author(s):  
Najmeh Cheraghi Shirazi ◽  
Abumoslem Jannesari ◽  
Pooya Torkzadeh
Keyword(s):  
Power Consumption ◽  
Transient Response ◽  
Output Voltage ◽  
Low Voltage ◽  
Charge Pump ◽  
Input Voltage ◽  
Cmos Technology ◽  
Clock Frequency ◽  
Voltage Ripple ◽  
Body Biasing

A new self-start-up switched-capacitor charge pump is proposed for low-power, low-voltage and battery-less implantable applications. To minimize output voltage ripple and improve transient response, interleaving regulation technique is applied to a multi-stage Cross-Coupled Charge Pump (CCCP) circuit. It splits the power flow in a time-sequenced manner. Three cases of study are designed and investigated with body-biasing technique by auxiliary transistors: Four-stage Two-Branch CCCP (TBCCCP), the two-cell four-stage Interleaved Two-Branch CCCP (ITBCCCP2) and four-cell four-stage Interleaved Two-Branch CCCP (ITBCCCP4). Multi-phase nonoverlap clock generator circuit with body-biasing technique is also proposed which can operate at voltages as low as CCCP circuits. The proposed circuits are designed with input voltage as low as 300 to 400[Formula: see text]mV and 20[Formula: see text]MHz clock frequency for 1[Formula: see text]pF load capacitance. Among the three designs, ITBCCCP4 has the lowest ramp-up time (41.6% faster), output voltage ripple (29% less) and power consumption (19% less). The Figure-Of-Merit (FOM) of ITBCCCP4 is the highest value among two others. For 400[Formula: see text]mV input voltage, ITBCCCP4 has a 98.3% pumping efficiency within 11.6[Formula: see text][Formula: see text]s, while having a maximum voltage ripple of 0.1% and a power consumption as low as 2.7[Formula: see text]nW. The FOM is 0.66 for this circuit. The designed circuits are implemented in 180-nm standard CMOS technology with an effective chip area of [Formula: see text][Formula: see text][Formula: see text]m for TBCCCP, [Formula: see text][Formula: see text][Formula: see text]m for ITBCCCP2 and [Formula: see text][Formula: see text][Formula: see text]m for ITBCCCP4.

Pulse Coding Controlled Switching Converter with Notch Generation and its Conversion Voltage Ratio Analysis

2020 ◽  
Vol 38 ◽  
pp. 171-178
Author(s):  
Yi Fei Sun ◽  
Yasunori Kobori ◽  
Anna Kuwana ◽  
Haruo Kobayashi
Keyword(s):  
Power Supply ◽  
Spread Spectrum ◽  
Output Voltage ◽  
Ratio Analysis ◽  
Input Frequency ◽  
Clock Frequency ◽  
Switching Converter ◽  
Voltage Ratio ◽  
Controlled Switching ◽  
Voltage Ripple

This paper proposes an EMI spread spectrum technology with automatically setting the notch frequency using the pulse coding controlled method of the DC-DC switching converter. In the automatic notch generation method, by usage of the input frequency Fin, the clock frequency Fckand the coding pulses PH, PL are generated automatically using the equation (see formula in the paper). Here the conversion voltage ratio is given by (see formula in the paper) . If shifts, the balance of the inductor current is shifted and then the output voltage ripple is influenced. Moreover, as the power supply IC, it is necessary to automatically detect or set the conditions for Vin and Vout, and hence we also provide discussion about the conversion voltage ratio Do in many situations.

scholarly journals Output Voltage Ripple Reduction in a Symmetric Multistage-Stacked Boost Architecture (MSBA) Converter

Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 394
Author(s):  
Julio C. Rosas-Caro
Keyword(s):  
Mathematical Model ◽  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Operation Mode ◽  
Switching Function ◽  
Switching Frequency ◽  
Voltage Ripple ◽  
Ripple Reduction ◽  
Similar Operation

This article proposes a different operation mode in a recently proposed converter, the multistage-stacked boost architecture (MSBA) converter working under the symmetric operation mode. The operation mode of the converter is analyzed with a modified pulse width modulation (PWM) scheme, in which the switching function of transistors is obtained from an interleaved scheme. The results show that the modified PWM results in a similar operation of the converter, with a reduced output voltage ripple, without increasing the switching frequency. A mathematical model of the converter is provided, the output voltage ripple calculation is performed in the traditional, and the modified PWM scheme, simulation, and experimental results are provided to verify the operation mode and the obtained equations.

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