Understanding the Effect of Reflow Profile on the Metallurgical Properties of Tin–Bismuth Solders

Sn–Bi alloys are desirable candidates for soldering components on printed circuit boards (PCBs) because of their low melting point and reduced cost. While certain tin–bismuth solders are well characterized many new alloys in this family have been developed which need proper characterization. The following study looks at the behavior of four different Sn–Bi alloys—traditional 42Sn58Bi and 42Sn57Bi1Ag and two new tin–bismuth alloys—in solder paste during the reflow soldering process. Each alloy was processed using different reflow profiles that had varying times above liquidus (TALs) and peak temperatures. The PCBs were then analyzed to see how the processing variables influenced wetting, voiding, microstructure, intermetallic layer composition, and thickness. After analysis, the PCBs were then subjected to thermal cycling experiments to see how reflow profile impacted microstructure evolution. The results demonstrated that reflow profile affects properties such as metal wetting and voiding. It does not however, greatly impact key metallurgical properties such as intermetallic layer thickness.

Investigation of solder beading phenomenon under surface-mounted electrolytic capacitors

Purpose The purpose of this paper is to study the solder beading phenomenon (referring to larger-sized solder balls) of surface-mounted electrolytic capacitors. Solder beading could induce failures by violating the minimal electrical clearance on the printed circuit board (PCB). In modern lead-free reflow soldering, especially in high-reliability industries, such as automotive, aeroplane and aerospace, detecting and preventing such defects is essential in reliable and cost-effective manufacturing. Design/methodology/approach The large size of the involved components may block the view of automatic optical inspection; therefore, X-ray inspection is necessary. To detect the failure mode, X-ray imaging, cross-section grinding, optical microscopy and Fourier transformed infrared spectroscopy were used. High-resolution noncontact profilometry and optical microscopy were used to analyse component designs. The surface mounting process steps were also analysed to reveal their dependence on the issue. Test methods were designed and performed to reveal the behaviour of the solder paste (SP) during the reflow soldering process and to emphasise the component design relevance. Findings It was found that the reduction of SP volume only reduces the failure rate but does not solve the problem. Results show that excessive component placement pressure could induce solder beading. Statistical analysis revealed that differences between distinct components had the highest effect on the solder beading rate. Design aspects of solder beading-prone components were identified and discussed as the primary source of the problem. Practical implications The findings can be applied in surface-mount technology production, where the total failure count and resulting failure costs could be reduced according to the findings. Originality/value This paper shows that component design aspects such as the low distance between the underside of the component and the PCB and blocked proper outgassing of volatile compounds of the SP can be root causes of solder beading under surface-mounted electrolytic capacitors.

Study the Electrical Properties of Surface Mount Device Integrated Silver Coated Vectran Yarn

Smart textiles have attracted huge attention due to their potential applications for ease of life. Recently, smart textiles have been produced by means of incorporation of electronic components onto/into conductive metallic yarns. The development, characterizations, and electro-mechanical testing of surface mounted electronic device (SMD) integrated E-yarns is still limited. There is a vulnerability to short circuits as non-filament conductive yarns have protruding fibers. It is important to determine the best construction method and study the factors that influence the textile properties of the base yarn. This paper investigated the effects of different external factors, namely, strain, solder pad size, temperature, abrasion, and washing on the electrical resistance of SMD integrated silver-coated Vectran (SCV) yarn. For this, a Vectran E-yarn was fabricated by integrating the SMD resistor into a SCV yarn by applying a vapor phase reflow soldering method. The results showed that the conductive gauge length, strain, overlap solder pad size, temperature, abrasion, and washing had a significant effect on the electrical resistance property of the SCV E-yarn. In addition, based on the experiment, the E-yarn made from SCV conductive thread and 68 Ω SMD resistor had the maximum electrical resistance and power of 72.16 Ω and 0.29 W per 0.31 m length. Therefore, the structure of this E-yarn is also expected to bring great benefits to manufacturing wearable conductive tracks and sensors.

Influence of Flux and Related Factors on Intermetallic Layer Growth within SAC305 Solder Joints

Flux contained in solder paste significantly affects the process of solder joint creation during reflow soldering, including the creation of an intermetallic layer (IML). This work investigates the dependence of intermetallic layer thickness on ROL0/ROL1 flux classification, glossy or matt solder mask, and OSP/HASL/ENIG soldering pad surface finish. Two original SAC305 solder pastes differing only in the used flux were chosen for the experiment. The influence of multiple reflows was also observed. The intermetallic layer thicknesses were obtained by the image analysis of micro-section images. The flux type proved to have a significant impact on the intermetallic layer thickness. The solder paste with ROL1 caused an increase in IML thickness by up to 40% in comparison to an identical paste with ROL0 flux. Furthermore, doubling the roughness of the solder mask has increased the resulting IML thickness by 37% at HASL surface finish and by an average of 22%.

A Supplemental Guide to Building the optoPlate-96 v1

The optoPlate-96 is a device that uses small LEDs to illuminate cell cultures in a 96-well plate. It was developed by Lukasz Bugaj and Wendell Lim. If you haven’t read the original optoPlate-96 paper and its Supplementary Information you should start there (Bugaj and Lim, Nature Protocols 2019). During the COVID-19 shutdown I made an optoPlate-96 in my basement over the course of many months. The protocol is detailed and awesome. But there are some things it doesn’t tell you, a few small typos, and several places where I just got confused. If you’ve never ordered a PCB or done reflow soldering, but are interested in giving it a try, this guide is for you.

Effect of rapid thermal shock cycle on the thermomechanical reliability of 20Sn-80Pb solder bumps

The influence of rapid thermal shock(RTS) cycles on 20Sn-80Pb solder bumps was studied. In the study, 20Sn-80Pb solder bumps were prepared by desktop nitrogen lead-free reflow soldering machine. The prepared 20Sn-80Pb solder bumps were used for RTS test in the temperature rang of 0°C ~ 150°C. One cycle of RTS is 24 seconds, and the temperature rise and fall rate of RTS is 12.5 C/s. The result indicated that when the cycle of RTS reached 1500T (here T is cycle, the same below), the shear strength of Sn-80Pb solder bump dropped by drastically 48.6%. Whereas, when the cycle of RTS reached 5500T, 20Sn-80Pb solder bumps’ shear strength decreased to 18.35 MPa, which increased by 7.5% compared with that of l6.97 MPa at 4500T. With the increase of RTS cycles, 20Sn-80Pb solder bumps’ shear strength was a decreasing trend and the fracture mechanism changed from ductile fracture to ductile-brittle mixed fracture, which could be subject to the thickening of the interfaical IMCs and the stress concentration caused by the growth of interfacial IMCs. To understand the changes of the mechanical properties of 20Sn-80Pb solder bumps, the influences of RTS on the crack and interfacial IMC of 20Sn-80Pb solder bumps were studied in details.

Influence of copper pillar bump structure on flip chip packaging during reflow soldering: a numerical approach

Purpose The purpose of this paper is to present the experimental and simulation studies on the influence of copper pillar bump structure on flip chip packaging during reflow soldering. Design/methodology/approach In this work, solidification/melting modelling and volume of fluid modelling were used. Reflow soldering process of Cu pillar type FC was modelled using computational fluid dynamic software (FLUENT). The experimental results have been validated with the simulation results to prove the accuracy of the numerical method. Findings The findings of this study reveal that solder volume is the most important element influencing reflow soldering. The solder cap volume reduces as the Cu pillar bump diameter lowers, making the reflow process more difficult to establish a good solder union, as less solder is allowed to flow. Last but not least, the solder cap height for the reflow process must be optimized to enable proper solder joint formation. Practical implications This study provides a basis and insights into the impact of copper pillar bump structure on flip chip packaging during reflow soldering that will be advancing the future design of 3D stack package. This study also provides a superior visualization and knowledge of the melting and solidification phenomenon during the reflow soldering process. Originality/value The computational fluid dynamics analysis of copper pillar bump structure on flip chip packaging during reflow soldering is scant. To the authors’ best knowledge, no research has been concentrated on copper pillar bump size configurations in a thorough manner. Without the in-depth study, copper pillar bump size might have the impact of copper pillar bump structure on flip chip packaging during reflow soldering. Five design of parameter of flip chip IC package model was proposed for the investigation of copper pillar bump structure on flip chip packaging during reflow soldering.