Nano-Indentation for Measurement on Mechanical Property of Building Integrated Amorphous Silicon Thin-Film PV Cell

Amorphous silicon thin-film PV cell(AST) generally consists of a few – micron thick silicon film on a glass substrate, which has difficulty for being accurately measured by using a conventional testing method to obtain its elastic modulus and hardness. In our study, we are applying nanoindentation for the measurement purpose and divide the sample into five regions for studying. Both of peak load - and loading rate - dependences supervise us to more accurately measure the mechanical properties of silicon layer through defining the peak load at 9000μN and loading rate at 1000μN/s. It was also observed that across the whole sample measurements on the elastic modulus have much better consistence than those on the hardness. We therefore propose a method of partitioning the sample into two parts for counting the different hardness measurements.

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Study on Light Induced Leakage Current Related to Amorphous Silicon TFT Design

Solid State Phenomena ◽

10.4028/www.scientific.net/ssp.124-126.259 ◽

2007 ◽

Vol 124-126 ◽

pp. 259-262

Author(s):

Jae Hong Jeon ◽

Kang Woong Lee

Keyword(s):

Thin Film ◽

Amorphous Silicon ◽

Leakage Current ◽

Thin Film Transistor ◽

Silicon Layer ◽

Gate Electrode ◽

Silicon Thin Film ◽

Pattern Design ◽

Conventional Design ◽

The One

We investigated the effect of amorphous silicon pattern design regarding to light induced leakage current in amorphous silicon thin film transistor. In addition to conventional design, where amorphous silicon layer is protruding outside the gate electrode, we designed and fabricated amorphous silicon thin film transistors in another two types of bottom gated structure. The one is that the amorphous silicon layer is located completely inside the gate electrode and the other is that the amorphous silicon layer is protruding outside the gate electrode but covered completely by the source and drain electrode. Measurement of the light induced leakage current caused by backlight revealed that the design where the amorphous silicon is located inside the gate electrode was the most effective however the last design was also effective in reducing the leakage current about one order lower than that of the conventional design.

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Simulation of the Growth, Structure and Crystallization of the Amorphous Silicon Thin Film

Advanced Materials Research ◽

10.4028/www.scientific.net/amr.602-604.1457 ◽

2012 ◽

Vol 602-604 ◽

pp. 1457-1460

Author(s):

Shi Wei Ren ◽

Jing Wei Sun ◽

Yan Zhong Hao

Keyword(s):

Thin Film ◽

Amorphous Silicon ◽

Silicon Film ◽

Single Crystal Silicon ◽

Distribution Functions ◽

Experiment Data ◽

Silicon Thin Film ◽

Crystal Silicon ◽

Irregular Structures ◽

Weber Potential

In this paper, using classical molecular dynamics, the growth of the amorphous silicon thin film deposited on the single crystal silicon is simulated and studied by Stillinger-Weber potential. The radial distribution functions of particles are calculated and the Voronoi diagrams of the films are given. The regular and irregular structures in the film are analyzed and the part crystallization condition is discussed. It is found that the features of the film are related with the ratio of the substrate temperature and the temperature of the incident atoms. The density of the deposited silicon film is obtained. The value of the density is about 2.2515g/cm3 which is consistent with the experiment data.

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Amorphous Silicon Thin-Film Transistors Modified by Doping and Plasma Treatment of the Nitride

MRS Proceedings ◽

10.1557/proc-219-309 ◽

1991 ◽

Vol 219 ◽

Cited By ~ 1

Author(s):

Norbert Nickel ◽

Rosari Saleh ◽

Walther Fuhs ◽

Helmut Mell

Keyword(s):

Thin Film ◽

Amorphous Silicon ◽

Thin Film Transistors ◽

Oxygen Plasma ◽

Silicon Film ◽

Transfer Characteristic ◽

Effective Density ◽

Defect States ◽

Silicon Thin Film ◽

Related Defect

ABSTRACTThin—film transistors (TFTs) were prepared by the glow—discharge deposition of amorphous silicon nitride (a—SiNx:H) and amorphous silicon (a—Si:H). The properties of these TFTs were varied in two ways: a) doping of the amorphous silicon film with phosphine or diborane and b) exposure of the a—SiNx:H film to an oxygen plasma prior to the deposition of the a—Si:H layer. The TFTs are characterized by measurements of the transfer characteristic, ISD(VG) and of the effective density of interface states, Ni(E), using a transient current spectroscopy (TCS). The dependence of Ni(E) on the Fermi—level position in the a—Si:H film suggests that for EC—EF > 0.6eV this quantity is mainly determined by interface related defect states whereas for Ec,—EF <0.6eV it is determined by doping—induced defect states. The exposure to the oxygen plasma results in a reduction of Ni in both the upper and lower half of the gap and in an improvement of the characteristic, in particular in p—channel TFTs. These changes are discussed in terms of the chemical-equilibrium or defect—pool concept.

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The Instability Characteristics of Amorphous Silicon Thin Film Transistors with Various Interfacial and Bulk Defect States

Japanese Journal of Applied Physics ◽

10.1143/jjap.36.6226 ◽

1997 ◽

Vol 36 (Part 1, No. 10) ◽

pp. 6226-6229 ◽

Cited By ~ 1

Author(s):

Huang-Chung Cheng ◽

Jun-Wei Tsai ◽

Chun-Yao Huang ◽

Fang-Chen Luo ◽

Hsing-Chien Tuan

Keyword(s):

Thin Film ◽

Amorphous Silicon ◽

Thin Film Transistors ◽

Defect States ◽

Silicon Thin Film

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Amorphous-silicon thin film transistor with two-step exposure process

10.1117/12.389409 ◽

2000 ◽

Author(s):

Pi-Fu Chen ◽

Jr-Hong Chen ◽

Dou-I Chen ◽

HsixgJu Sung ◽

June-Wei Hwang ◽

...

Keyword(s):

Thin Film ◽

Amorphous Silicon ◽

Thin Film Transistor ◽

Silicon Thin Film ◽

Exposure Process

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Hot-Wire Deposited Amorphous Silicon Thin-Film Transistors

MRS Proceedings ◽

10.1557/proc-424-31 ◽

1996 ◽

Vol 424 ◽

Cited By ~ 1

Author(s):

R. E. I. Schropp ◽

K. F. Feenstra ◽

C. H. M. Van Der Werf ◽

J. Holleman ◽

H. Meiling

Keyword(s):

Thin Film ◽

Amorphous Silicon ◽

Thin Film Transistors ◽

Gate Dielectric ◽

Chemical Vapor ◽

Current Crowding ◽

Hot Wire ◽

Saturation Regime ◽

Silicon Thin Film ◽

Order Of Magnitude

AbstractWe present the first thin film transistors (TFTs) incorporating a low hydrogen content (5 - 9 at.-%) amorphous silicon (a-Si:H) layer deposited by the Hot-Wire Chemical Vapor Deposition (HWCVD) technique. This demonstrates the possibility of utilizing this material in devices. The deposition rate by Hot-Wire CVD is an order of magnitude higher than by Plasma Enhanced CVD. The switching ratio for TFTs based on HWCVD a-Si:H is better than 5 orders of magnitude. The field-effect mobility as determined from the saturation regime of the transfer characteristics is still quite poor. The interface with the gate dielectric needs further optimization. Current crowding effects, however, could be completely eliminated by a H2 plasma treatment of the HW-deposited intrinsic layer. In contrast to the PECVD reference device, the HWCVD device appears to be almost unsensitive to bias voltage stressing. This shows that HW-deposited material might be an approach to much more stable devices.

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