Study on Abstraction Modeling of a Networked Senor System in a Multiple-Language Environment

Developing highly efficient and reliable embedded system demands hardware/software co-design. To be high-configurable embedded systems, designers seek for transaction-level modeling and component based development. Our approach employ platform-based design and component-based design and apply it to a networked sensor system. We introduce a multiple-language environment unified component-based model and apply it to co-simulation of sensor system instances. The case studies demonstrate that our approach is readily applicable to real-world networked sensor systems and reduces the co-simulation complexities.

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A Novel Rail-Network Hardware Simulator for Embedded System Programming

Electronics ◽

10.3390/electronics10010013 ◽

2020 ◽

Vol 10 (1) ◽

pp. 13

Author(s):

Balaji M ◽

Chandrasekaran M ◽

Vaithiyanathan Dhandapani

Keyword(s):

Embedded Systems ◽

Embedded System ◽

Real Time ◽

Learning Outcomes ◽

Real World ◽

Time Constraints ◽

Network Simulator ◽

Practical Applications ◽

Rail Network ◽

Knowledge Enhancement

A Novel Rail-Network Hardware with simulation facilities is presented in this paper. The hardware is designed to facilitate the learning of application-oriented, logical, real-time programming in an embedded system environment. The platform enables the creation of multiple unique programming scenarios with variability in complexity without any hardware changes. Prior experimental hardware comes with static programming facilities that focus the students’ learning on hardware features and programming basics, leaving them ill-equipped to take up practical applications with more real-time constraints. This hardware complements and completes their learning to help them program real-world embedded systems. The hardware uses LEDs to simulate the movement of trains in a network. The network has train stations, intersections and parking slots where the train movements can be controlled by using a 16-bit Renesas RL78/G13 microcontroller. Additionally, simulating facilities are provided to enable the students to navigate the trains by manual controls using switches and indicators. This helps them get an easy understanding of train navigation functions before taking up programming. The students start with simple tasks and gradually progress to more complicated ones with real-time constraints, on their own. During training, students’ learning outcomes are evaluated by obtaining their feedback and conducting a test at the end to measure their knowledge acquisition during the training. Students’ Knowledge Enhancement Index is originated to measure the knowledge acquired by the students. It is observed that 87% of students have successfully enhanced their knowledge undergoing training with this rail-network simulator.

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A Two-Layer Component-Based Allocation for Embedded Systems with GPUs

Designs ◽

10.3390/designs3010006 ◽

2019 ◽

Vol 3 (1) ◽

pp. 6

Author(s):

Gabriel Campeanu ◽

Mehrdad Saadatmand

Keyword(s):

Embedded Systems ◽

Embedded System ◽

Heterogeneous Systems ◽

Connected Components ◽

Memory Usage ◽

Allocation Mechanism ◽

Component Based Development ◽

Allocation Process ◽

Gpu Architectures ◽

High Level

Component-based development is a software engineering paradigm that can facilitate the construction of embedded systems and tackle its complexities. The modern embedded systems have more and more demanding requirements. One way to cope with such a versatile and growing set of requirements is to employ heterogeneous processing power, i.e., CPU–GPU architectures. The new CPU–GPU embedded boards deliver an increased performance but also introduce additional complexity and challenges. In this work, we address the component-to-hardware allocation for CPU–GPU embedded systems. The allocation for such systems is much complex due to the increased amount of GPU-related information. For example, while in traditional embedded systems the allocation mechanism may consider only the CPU memory usage of components to find an appropriate allocation scheme, in heterogeneous systems, the GPU memory usage needs also to be taken into account in the allocation process. This paper aims at decreasing the component-to-hardware allocation complexity by introducing a two-layer component-based architecture for heterogeneous embedded systems. The detailed CPU–GPU information of the system is abstracted at a high-layer by compacting connected components into single units that behave as regular components. The allocator, based on the compacted information received from the high-level layer, computes, with a decreased complexity, feasible allocation schemes. In the last part of the paper, the two-layer allocation method is evaluated using an existing embedded system demonstrator; namely, an underwater robot.

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Compiler-Aided Run-Time Performance Speed-Up in Super-Scalar Processor

10.28945/3391 ◽

2009 ◽

Author(s):

Moshe Pelleh

Keyword(s):

Embedded Systems ◽

Embedded System ◽

General Purpose ◽

Experimental Results ◽

Medium Size ◽

Organic System ◽

Software Application ◽

Organic Systems ◽

Special Cases ◽

Run Time

In our world, where most systems become embedded systems, the approach of designing embedded systems is still frequently similar to the approach of designing organic systems (or not embedded systems). An organic system, like a personal computer or a work station, must be able to run any task submitted to it at any time (with certain constrains depending on the machine). Consequently, it must have a sophisticated general purpose Operating System (OS) to schedule, dispatch, maintain and monitor the tasks and assist them in special cases (particularly communication and synchronization between them and with external devices). These OSs require an overhead on the memory, on the cache and on the run time. Moreover, generally they are task oriented rather than machine oriented; therefore the processor's throughput is penalized. On the other hand, an embedded system, like an Anti-lock Braking System (ABS), executes always the same software application. Frequently it is a small or medium size system, or made up of several such systems. Many small or medium size embedded systems, with limited number of tasks, can be scheduled by our proposed hardware architecture, based on the Motorola 500MHz MPC7410 processor, enhancing its throughput and avoiding the software OS overhead, complexity, maintenance and price. Encouraged by our experimental results, we shall develop a compiler to assist our method. In the meantime we will present here our proposal and the experimental results.

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SEM-Based Nanoprobing on 40, 32 and 28 nm CMOS Devices Challenges for Semiconductor Failure Analysis

ISTFA 2013: Conference Proceedings from the 39th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2013p0217 ◽

2013 ◽

Author(s):

Erik Paul ◽

Holger Herzog ◽

Sören Jansen ◽

Christian Hobert ◽

Eckhard Langer

Keyword(s):

Electron Microscope ◽

High Resolution ◽

Scanning Electron Microscope ◽

Failure Analysis ◽

Case Studies ◽

State Of The Art ◽

Root Cause ◽

Highly Efficient ◽

Technology Nodes ◽

Scanning Electron

Abstract This paper presents an effective device-level failure analysis (FA) method which uses a high-resolution low-kV Scanning Electron Microscope (SEM) in combination with an integrated state-of-the-art nanomanipulator to locate and characterize single defects in failing CMOS devices. The presented case studies utilize several FA-techniques in combination with SEM-based nanoprobing for nanometer node technologies and demonstrate how these methods are used to investigate the root cause of IC device failures. The methodology represents a highly-efficient physical failure analysis flow for 28nm and larger technology nodes.

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Analysis of elementary school pre-service teachers' responses to real-world problems and their case studies: Focusing on finding octagonal pavilion floor area

Korean Association For Learner-Centered Curriculum And Instruction ◽

10.22251/jlcci.2020.20.10.1061 ◽

2020 ◽

Vol 20 (10) ◽

pp. 1061-1083

Author(s):

Sang Hun Song

Keyword(s):

Elementary School ◽

Case Studies ◽

Real World ◽

Floor Area ◽

Real World Problems

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A Generalization Performance Study Using Deep Learning Networks in Embedded Systems

Sensors ◽

10.3390/s21041031 ◽

2021 ◽

Vol 21 (4) ◽

pp. 1031

Author(s):

Joseba Gorospe ◽

Rubén Mulero ◽

Olatz Arbelaitz ◽

Javier Muguerza ◽

Miguel Ángel Antón

Keyword(s):

Deep Learning ◽

Embedded Systems ◽

Embedded System ◽

General Purpose ◽

Learning Networks ◽

Performance Study ◽

Learning Techniques ◽

Wide Range ◽

Learning Architectures

Deep learning techniques are being increasingly used in the scientific community as a consequence of the high computational capacity of current systems and the increase in the amount of data available as a result of the digitalisation of society in general and the industrial world in particular. In addition, the immersion of the field of edge computing, which focuses on integrating artificial intelligence as close as possible to the client, makes it possible to implement systems that act in real time without the need to transfer all of the data to centralised servers. The combination of these two concepts can lead to systems with the capacity to make correct decisions and act based on them immediately and in situ. Despite this, the low capacity of embedded systems greatly hinders this integration, so the possibility of being able to integrate them into a wide range of micro-controllers can be a great advantage. This paper contributes with the generation of an environment based on Mbed OS and TensorFlow Lite to be embedded in any general purpose embedded system, allowing the introduction of deep learning architectures. The experiments herein prove that the proposed system is competitive if compared to other commercial systems.

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Singular Value Decomposition in Embedded Systems Based on ARM Cortex-M Architecture

Electronics ◽

10.3390/electronics10010034 ◽

2020 ◽

Vol 10 (1) ◽

pp. 34

Author(s):

Michele Alessandrini ◽

Giorgio Biagetti ◽

Paolo Crippa ◽

Laura Falaschetti ◽

Lorenzo Manoni ◽

...

Keyword(s):

Embedded Systems ◽

Singular Value Decomposition ◽

Embedded System ◽

Mimo Systems ◽

Singular Value ◽

Measurement Unit ◽

Comprehensive Treatment ◽

Mathematical Tool ◽

Value Decomposition ◽

Speed Accuracy

Singular value decomposition (SVD) is a central mathematical tool for several emerging applications in embedded systems, such as multiple-input multiple-output (MIMO) systems, data analytics, sparse representation of signals. Since SVD algorithms reduce to solve an eigenvalue problem, that is computationally expensive, both specific hardware solutions and parallel implementations have been proposed to overcome this bottleneck. However, as those solutions require additional hardware resources that are not in general available in embedded systems, optimized algorithms are demanded in this context. The aim of this paper is to present an efficient implementation of the SVD algorithm on ARM Cortex-M. To this end, we proceed to (i) present a comprehensive treatment of the most common algorithms for SVD, providing a fairly complete and deep overview of these algorithms, with a common notation, (ii) implement them on an ARM Cortex-M4F microcontroller, in order to develop a library suitable for embedded systems without an operating system, (iii) find, through a comparative study of the proposed SVD algorithms, the best implementation suitable for a low-resource bare-metal embedded system, (iv) show a practical application to Kalman filtering of an inertial measurement unit (IMU), as an example of how SVD can improve the accuracy of existing algorithms and of its usefulness on a such low-resources system. All these contributions can be used as guidelines for embedded system designers. Regarding the second point, the chosen algorithms have been implemented on ARM Cortex-M4F microcontrollers with very limited hardware resources with respect to more advanced CPUs. Several experiments have been conducted to select which algorithms guarantee the best performance in terms of speed, accuracy and energy consumption.

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Handrails through the Swamp? A Pilot to Test the Integration and Implementation Science Framework in Complex Real-World Research

Sustainability ◽

10.3390/su13105491 ◽

2021 ◽

Vol 13 (10) ◽

pp. 5491

Author(s):

Melissa Robson-Williams ◽

Bruce Small ◽

Roger Robson-Williams ◽

Nick Kirk

Keyword(s):

Pilot Study ◽

Case Studies ◽

Implementation Science ◽

Real World ◽

Environmental Problems ◽

Environmental Research ◽

Integrative Framework ◽

The World ◽

Science Framework ◽

Real World Problems

The socio-environmental challenges the world faces are ‘swamps’: situations that are messy, complex, and uncertain. The aim of this paper is to help disciplinary scientists navigate these swamps. To achieve this, the paper evaluates an integrative framework designed for researching complex real-world problems, the Integration and Implementation Science (i2S) framework. As a pilot study, we examine seven inter and transdisciplinary agri-environmental case studies against the concepts presented in the i2S framework, and we hypothesise that considering concepts in the i2S framework during the planning and delivery of agri-environmental research will increase the usefulness of the research for next users. We found that for the types of complex, real-world research done in the case studies, increasing attention to the i2S dimensions correlated with increased usefulness for the end users. We conclude that using the i2S framework could provide handrails for researchers, to help them navigate the swamps when engaging with the complexity of socio-environmental problems.

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Patch-Type Vibration Visualization (PVV) Sensor System Based on Triboelectric Effect

Sensors ◽

10.3390/s21123976 ◽

2021 ◽

Vol 21 (12) ◽

pp. 3976

Author(s):

Sun Jin Kim ◽

Myeong-Lok Seol ◽

Byun-Young Chung ◽

Dae-Sic Jang ◽

Jonghwan Kim ◽

...

Keyword(s):

Signal Processing ◽

Low Power ◽

Nuclear Power ◽

Power Plants ◽

Computing System ◽

Sensor System ◽

Wireless Sensor ◽

Sensor Systems ◽

Patch Type ◽

Triboelectric Effect

Self-powered wireless sensor systems have emerged as an important topic for condition monitoring in nuclear power plants. However, commercial wireless sensor systems still cannot be fully self-sustainable due to the high power consumption caused by excessive signal processing in a mini-electronic computing system. In this sense, it is essential not only to integrate the sensor system with energy-harvesting devices but also to develop simple data processing methods for low power schemes. In this paper, we report a patch-type vibration visualization (PVV) sensor system based on the triboelectric effect and a visualization technique for self-sustainable operation. The PVV sensor system composed of a polyethylene terephthalate (PET)/Al/LCD screen directly converts the triboelectric signal into an informative black pattern on the LCD screen without excessive signal processing, enabling extremely low power operation. In addition, a proposed image processing method reconverts the black patterns to frequency and acceleration values through a remote-control camera. With these simple signal-to-pattern conversion and pattern-to-data reconversion techniques, a vibration visualization sensor network has successfully been demonstrated.

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