Effect of Gate Dielectrics on the Performance of P-Type Cu2O TFTs Processed at Room Temperature

Single-phase Cu2O films with p-type semiconducting properties were successfully deposited by reactive DC magnetron sputtering at room temperature followed by post annealing process at 200°C. Subsequently, such films were used to fabricate bottom gate p-channel Cu2O thin film transistors (TFTs). The effect of using high-κ SrTiO3 (STO) as a gate dielectric on the Cu2O TFT performance was investigated. The results were then compared to our baseline process which uses a 220 nm aluminum titanium oxide (ATO) dielectric deposited on a glass substrate coated with a 200 nm indium tin oxide (ITO) gate electrode. We found that with a 150 nm thick STO, the Cu2O TFTs exhibited a p-type behavior with a field-effect mobility of 0.54 cm2.V-1.s-1, an on/off ratio of around 44, threshold voltage equaling-0.62 V and a sub threshold swing of 1.64 V/dec. These values were obtained at a low operating voltage of-2V. The advantages of using STO as a gate dielectric relative to ATO are discussed.

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Structural, dielectric, electrical and piezoelectric properties of Ba4SrRTi3V7O30 (R=Sm, Dy) ceramics

Open Physics ◽

10.2478/s11534-008-0112-3 ◽

2008 ◽

Vol 6 (4) ◽

Cited By ~ 8

Author(s):

Priyadarshini Sahoo ◽

Anuradha Panigrahi ◽

Sunanda Patri ◽

Ram Choudhary

Keyword(s):

Room Temperature ◽

Single Phase ◽

Complex Impedance ◽

Tungsten Bronze ◽

Negative Temperature ◽

Scanning Electron Micrographs ◽

Polarization Study ◽

Semiconducting Properties ◽

Wide Range

AbstractPolycrystalline samples of Ba4SrRTi3V7O30 (R=Sm and Dy), members of the tungsten-bronze family, were prepared using a high-temperature, solid-state reaction technique and studied their electrical properties (using complex impedance spectroscopy) in a wide range of temperature (31–500°C) and frequency (1 kHz-1 MHz). Preliminary structural (XRD) analyses of these compounds show the formation of single-phase, orthorhombic structures at room temperature. The scanning electron micrographs (SEM) provided information on the quality of the samples and uniform distribution of grains over the entire surface of the samples. Detailed studies of the dielectric properties suggest that they have undergone ferroelectric-paraelectric phase transition well above the room temperatures (i.e., 432 and 355°C for R= Sm and Dy, respectively, at frequency 100 kHz). Measurements of electrical conductivity (ac and dc) as a function of temperature suggest that the compounds have semiconducting properties much above the room temperature, with negative temperature coefficient of resistance (NTCR) behavior. The existence of ferroelectricity in these compounds was confirmed from a polarization study.

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Indium Tin Oxide Films with Low Resistivity at Room Temperature Using DC Magnetron Sputtering with Grid Electrode

MATERIALS TRANSACTIONS ◽

10.2320/matertrans.m2013316 ◽

2014 ◽

Vol 55 (3) ◽

pp. 605-609 ◽

Cited By ~ 1

Author(s):

Ho-Nyun Lee ◽

Jin-Young Hur ◽

Hyun Jong Kim ◽

Min Hyung Lee ◽

Hong Kee Lee

Keyword(s):

Magnetron Sputtering ◽

Tin Oxide ◽

Indium Tin Oxide ◽

Room Temperature ◽

Oxide Films ◽

Dc Magnetron Sputtering ◽

Grid Electrode ◽

Low Resistivity ◽

Tin Oxide Films

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SPUTTERING DEPOSITION OF Tl–Ca–Ba–Cu–O THIN FILMS WITH ZERO RESISTANCE AT 101 K

Modern Physics Letters B ◽

10.1142/s0217984989001576 ◽

1989 ◽

Vol 03 (13) ◽

pp. 1013-1016 ◽

Cited By ~ 6

Author(s):

S. L. YAN ◽

X. J. HU ◽

Q. X. SONG ◽

H. L. CAO ◽

J. YAN ◽

...

Keyword(s):

Thin Films ◽

Magnetron Sputtering ◽

Surface Structure ◽

Single Phase ◽

Xrd Analysis ◽

Dc Magnetron Sputtering ◽

Ceramic Substrates ◽

Sputtering Deposition ◽

Post Annealing ◽

Zero Resistance

Superconducting Tl–Ca–Ba–Cu–O thin films have been prepared by dc magnetron sputtering from a pair of Tl 2 Ca 1 Ba 3 Cu 4 O y bulk targets. The post-annealing films on ZrO 2 ceramic substrates exhibit an onset temperature of about 125 K and zero resistance as high as 101 K. SEM showed a smooth terraced surface structure. The XRD analysis proved that the films were polycrystalline and were not single phase superconducting material.

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Analysis of Degradation Mechanisms of Gate Dielectrics Based on SiO2 in MOS Transistors

Proceedings of Universities ELECTRONICS ◽

10.24151/1561-5405-2020-25-6-517-524 ◽

2020 ◽

Vol 25 (6) ◽

pp. 517-524

Author(s):

D.A. Eliseeva ◽

◽

S.O. Safonov ◽

◽

Keyword(s):

Mathematical Models ◽

Gate Dielectric ◽

Gate Dielectrics ◽

Degradation Mechanism ◽

Operating Time ◽

Operating Conditions ◽

Hole Injection ◽

Operating Voltage ◽

Mos Transistors ◽

The Impact

Nowadays, the developed mathematical models, describing the degradation mechanism of the gate dielectric, permit to determine the value of the operating time to failure of a device depending on its internal properties and operating conditions. These models significantly reduce the time and material required for performing testing and processing of large amounts of experimental data. In the paper the gate dielectric gates based on SiO in n -and p -channel MOS transistors have been studied. It has been found that under the impact of the electric field the degradation of the gate dielectric with 5.3 nm thickness most likely occurs according to the thermochemical model ( E -model) and in case with 7 nm thickness dielectric- in accordance with the anode hole injection model (1/ E -model). The coefficients have been calculated and the analysis of the mathematical models, permitting to determine the service life gate dielectrics based on SiO with 7 nm thickness in n - and p -channel MOS transistors for different values, of their area, operating voltage and temperature, has been performed. This study can serve as a method for monitoring and determining the quality of the gate dielectrics of manufactured MOS transistors.

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The study of Mg2Sn Thin Film Material for Heat Energy Conversion Applications in Room Temperature Range

MRS Advances ◽

10.1557/adv.2016.348 ◽

2016 ◽

Vol 1 (60) ◽

pp. 3977-3982 ◽

Cited By ~ 2

Author(s):

Mikihiko Nishitani ◽

Tatsuki Yokoyama ◽

Yukihiro Morita ◽

Tessei Kurashiki

Keyword(s):

Thin Film ◽

Room Temperature ◽

Single Phase ◽

Metal Layer ◽

Film Material ◽

Cubic Crystal ◽

Thin Film Material ◽

Ag Doping ◽

P Type ◽

Nanometer Thickness

ABSTRACTA study of Mg2Sn thin film material expected a high Thermo-Electrical (TE) characteristics in Room Temperature (RT) range is presented. The single phase (cubic crystal) Mg2Sn thin film is successfully formed on a glass substrate at 550 degree C with the conventional magnetron sputtering process when a metal layer of silver (Ag) or indium (In) of less than a hundred nanometer thickness is pre-coated before the deposition of Mg2Sn. The pre-coated material of Ag or In is diffused into the Mg2Sn film. P-type doping for the Mg2Sn by Ag is successful in this process, but n-type doping for the Mg2Sn film by In is not. In addition, it is found on Ag doping films that the Seebeck coefficient doesn’t decrease with the increase of the conductivity due to Ag doping which is different from the dependency of Ag doping in the bulk of Mg2Sn.

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MBE Growth and Characterization of II-VI Blue/Green Laser Diodes Having CW Operation at Room Temperature

MRS Proceedings ◽

10.1557/proc-340-431 ◽

1994 ◽

Vol 340 ◽

Cited By ~ 3

Author(s):

M.D. Ringle ◽

D.C. Grillo ◽

Y. Fan ◽

L. He ◽

J. Han ◽

...

Keyword(s):

Room Temperature ◽

Continuous Wave ◽

Threshold Current ◽

Green Laser ◽

Operating Voltage ◽

Mbe Growth ◽

Current Densities ◽

P Type ◽

Laser Devices

ABSTRACTWe have obtained continuous-wave laser operation at room temperature from a (Zn,Mg)(S,Se)-based Il-VI separate-confinement heterostructure where injection of holes into the p-type quaternary was achieved through the employment of a Zn(Se,Te) graded-bandgap contact. The laser devices exhibit threshold current densities of below 300 A/cm2 and voltages below 6 V. Issues related to the control of the growth of the quaternary (Zn,Mg)(S,Se) compound, and a proposal to further reducing the laser operating voltage will also be described.

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Low Resistivity Transparent Indium Tin Oxide (Ito) Films Sputtered At Room Temperature With H2O Addition

MRS Proceedings ◽

10.1557/proc-424-341 ◽

1996 ◽

Vol 424 ◽

Cited By ~ 2

Author(s):

Ken-Ichi Onisawa ◽

Etsuko Nishimura ◽

Masahiko Ando ◽

Takeshi Satou ◽

Masaru Takabatake* ◽

...

Keyword(s):

Tin Oxide ◽

Indium Tin Oxide ◽

Room Temperature ◽

Oxygen Vacancies ◽

Dc Magnetron Sputtering ◽

Low Resistivity ◽

Ito Film ◽

Good Pattern ◽

Cluster Type ◽

Argon Sputtering

AbstractA new kind of amorphous indium tin oxide (ITO) film with good pattern delineation properties and mass production capability, as well as low resistivity and high transparency has been developed. The film was prepared by a cluster-type DC magnetron sputtering apparatus at room temperature with H2O addition to the argon sputtering gas. The amorphous ITO film quality was improved by effective termination of oxygen vacancies with -OH species generated by enhanced decomposition from the added H2O in the plasma.

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Low-voltage self-assembled indium tin oxide thin-film transistors gated by microporous SiO2 treated by H3PO4

RSC Advances ◽

10.1039/c9ra07166k ◽

2019 ◽

Vol 9 (53) ◽

pp. 30715-30719 ◽

Cited By ~ 2

Author(s):

Wei Dou ◽

Yuanyuan Tan

Keyword(s):

Thin Film ◽

Tin Oxide ◽

Indium Tin Oxide ◽

Electric Double Layer ◽

Thin Film Transistors ◽

Room Temperature ◽

Gate Dielectric ◽

Low Voltage ◽

Oxide Thin Film ◽

Self Assembled

Ultralow-voltage (0.8 V) thin-film transistors (TFTs) using self-assembled indium-tin-oxide (ITO) as the semiconducting layer and microporous SiO2 immersed in 5% H3PO4 for 30 minutes with huge electric-double-layer (EDL) capacitance as the gate dielectric are fabricated at room temperature.

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Low Resistance Optically Transparent Contacts to p–type GaN Using Oxidized Ni/Au and ITO for LED Application

MRS Proceedings ◽

10.1557/proc-639-g4.8 ◽

2000 ◽

Vol 639 ◽

Cited By ~ 6

Author(s):

C. H. Lin ◽

D. L. Hibbard ◽

A. Au ◽

H. P. Lee ◽

Z. J. Dong ◽

...

Keyword(s):

Tin Oxide ◽

Indium Tin Oxide ◽

High Performance ◽

Light Emission ◽

Dramatic Improvement ◽

Operating Voltage ◽

Low Resistance ◽

Specific Contact ◽

Specific Contact Resistivity ◽

P Type

ABSTRACTWe report on a high transparency low resistance contact to p-GaN composed of a thin oxidized Ni/Au bilayer overcoated with indium tin oxide (NiO/Au/ITO). The NiO/Au/ITO layer shows a specific contact resistivity, c, of 1.8 × 10−3 Ωcm2 that is nearly ten times lower than conventional Ni/Au annealed under N2. Measurements on fully processed LEDs with a NiO/Au/ITO current spreading layer (CSL) show an operating voltage of around 4 V at 20 mA that is comparable to LEDs fabricated with a conventional Ni/Au CSL and a dramatic improvement over the previous ITO data. LED top surface light emission through the NiO/Au/ITO CSL is shown to be greater than that from LEDs with a conventional semi-transparent Ni/Au CSL. Taken together, these results demonstrate the feasibility of using NiO/Au/ITO as a CSL for high performance GaN LEDs.

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