Reducing On-Resistance for SiC Diodes by Thin Wafer and Laser Anneal Technology

2020 ◽  
Vol 1004 ◽  
pp. 155-160
Author(s):  
Oleg Rusch ◽  
Carsten Hellinger ◽  
Jonathan Moult ◽  
Yunji Corcoran ◽  
Tobias Erlbacher
Keyword(s):  
Laser Annealing ◽  
Voltage Drop ◽  
Electrical Performance ◽  
Leakage Currents ◽  
Nominal Voltage ◽  
Laser Anneal ◽  
Substrate Doping ◽  
Wafer Thinning ◽  
Ohmic Contact Formation ◽  
The Given

This work presents the influence of Thin Wafer und Laser Anneal Technology on the electrical performance of 4HSiC devices. Substrate thinning and backside ohmic contact formation via laser annealing were successfully applied to in-house designed and manufactured 6 A 650 V SiC diodes at IISB, improving its forward characteristics. The given devices exhibit an on-state voltage drop (VF) reduction from 1.78 V to 1.62 V at 6 A rated current while maintaining blocking capabilities of more than 1.1 kV with leakage currents less than 1 μA at 650 V nominal voltage. On-resistance (RON) was lowered by approx. 30 % to 90 mΩ and 60 % to 12 mΩ in Schottky and conductivity modulation state, respectively. Wafer thinning also allows reducing the influence of non-homogeneous distributed substrate doping concentrations, leading to a more narrow distribution of the forward characteristics of the devices across the wafer.

Low-Resistance Ohmic Contact Formation by Laser Annealing of N-Implanted 4H-SiC

2020 ◽  
Vol 1004 ◽  
pp. 718-724
Author(s):  
Carsten Hellinger ◽  
Oleg Rusch ◽  
Mathias Rommel ◽  
Anton J. Bauer ◽  
Tobias Erlbacher
Keyword(s):  
Crystal Structure ◽  
Pulse Duration ◽  
Ohmic Contact ◽  
Laser Annealing ◽  
Voltage Drop ◽  
Pulsed Laser ◽  
Electrical Measurements ◽  
Low Resistance ◽  
Contact Formation ◽  
Ohmic Contact Formation

In this work, pulsed-laser-based tempering was applied for post-implant annealing of n-type N-doped 4H-SiC in order to electrically activate the dopants and to rebuild the crystal structure. The annealing was performed by a frequency-tripled Nd:YVO4 laser with a pulse duration of 60 ns. To evaluate the effects of post-implant annealing, JBS diodes were electrically characterized. The results were compared with implanted, not post-annealed JBS diodes. The electrical measurements showed a significant on-state voltage drop of 40 mV at 6 A for post-implant laser annealed diodes compared to not post-implant annealed diodes.

Photoluminescence in laser-annealed neutron transmuted silicon: isoelectronic traps

1981 ◽  
Vol 59 (4) ◽  
pp. 496-499 ◽  
Author(s):  
J. A. Rostworowski ◽  
R. R. Parsons
Keyword(s):  
Ruby Laser ◽  
Laser Annealing ◽  
Emission Lines ◽  
Neutron Transmutation Doping ◽  
Annealed Material ◽  
Ultra High Purity ◽  
High Purity Silicon ◽  
Transmutation Doping ◽  
Neutron Transmutation ◽  
Laser Anneal

A Q-switched ruby laser is used to laser-anneal neutron transmuted silicon. The starting material was ultra high purity silicon. Approximately 2 × 1014 P/cm3 were created by the neutron transmutation doping. Photoluminescence measurements at T = 1.7, 4.2, and 20 K revealed long-lived sharp emission lines which were identified with an isoelectronic trap remaining in the laser-annealed material. P-related luminescence was not observed before or after laser annealing.

Effects of Nonmelt Laser Annealing on a 5keV Boron Implant in Silicon

2000 ◽  
Vol 610 ◽  
Author(s):  
Susan Earles ◽  
Mark Law ◽  
Kevin Jones ◽  
Rich Brindos ◽  
omit Talwar
Keyword(s):  
Thermal Processing ◽  
Laser Annealing ◽  
Defect Density ◽  
Ramp Rate ◽  
Rapid Thermal Anneal ◽  
Extended Defect ◽  
Enhanced Diffusion ◽  
Post Annealing ◽  
Laser Anneal ◽  
Laser Thermal Processing

AbstractTo investigate the effects of ramp rate on the transient enhanced diffusion of boron in silicon, laser thermal processing (LTP) in the nonmelt regime has been investigated. A nonmelt laser anneal has been performed on a 5 keV, 1e15 boron implant. The implant energy of 5keV was chosen to simplify analysis. A rapid thermal anneal (RTA) at 1000°C and furnace anneals at 750 °C were used to show the effect of post annealing on the LTPd samples. Results show the sheet resistance drops by up to a factor of two for samples receiving the nonmelt LTP and the RTA compared with the samples just receiving the RTA. An increase in the hall mobility was also observed for the samples receiving the LTP. The nonmelt LTP was also shown to strongly affect the extended defect density. During post anneals, a higher density of smaller defects evolved in the samples receiving the LTP.

STUDY OF THE MORPHOLOGICAL MODIFICATIONS INDUCED BY LASER ANNEALING OF PREAMORPHIZED SILICON

2001 ◽  
Vol 08 (05) ◽  
pp. 441-445 ◽  
Author(s):  
Y. F. CHONG ◽  
K. L. PEY ◽  
Y. F. LU ◽  
A. T. S. WEE ◽  
A. SEE
Keyword(s):  
Surface Roughness ◽  
Laser Fluence ◽  
Laser Annealing ◽  
Periodic Structures ◽  
Threshold Fluence ◽  
High Fluence ◽  
Force Microscopy ◽  
Atomic Force ◽  
Laser Anneal ◽  
Roughness Measurements

Atomic force microscopy was employed to characterize the morphological modifications induced by laser annealing of preamorphized silicon. Laser irradiation was performed at different fluence with fixed pulse durations of 23 ns. In all cases, the laser fluence used is above the threshold fluence that is needed to melt the preamorphized layer. Roughness measurements show that the surface roughness of the silicon samples increases when the laser fluence increases. Since the laser anneal was performed in air, the changes in morphology may be associated with the surface oxide formed. When a high fluence was employed, the extension of melting was sufficient to remove all surface features of the as-implanted sample but apparently there was not enough time to completely redistribute the material upon solidification. As a result, ripple-like periodic structures are formed on the surface. Therefore, a low laser fluence should be used whenever possible in the annealing of silicon samples.

3kV 4H-SiC Thyristors for Pulsed Power Applications

2010 ◽  
Vol 645-648 ◽  
pp. 1053-1056 ◽  
Author(s):  
Ahmed Elasser ◽  
Peter A. Losee ◽  
Steve Arthur ◽  
Zachary Stum ◽  
Kevin Matocha ◽  
...  
Keyword(s):  
Voltage Drop ◽  
Wide Bandgap ◽  
Pulsed Power ◽  
Large Area ◽  
Leakage Currents ◽  
Low Leakage ◽  
Forward Voltage Drop ◽  
Order Of Magnitude ◽  
High Pulse ◽  
High Electric Field Strength

Due to the Silicon Carbide (SiC) material’s high electric field strength, wide bandgap, and good thermal conductivity, 4H-SiC thyristors are attractive candidates for pulsed power applications. With a thinner blocking layer almost an order of magnitude smaller than its Silicon (Si) counterpart, these devices promise very fast turn-on capabilities as full conductivity modulation occurs >10 times faster than comparable silicon thyristors, low leakage currents at high junction temperatures and at high voltage, and much lower forward voltage drop at high pulse currents. Our progress on the development of large area (4mm x 4mm) SiC thyristors is presented in this paper.

scholarly journals The Electrical Behaviour of Polymer Insulator under Different Weather Conditions

2015 ◽  
Vol 793 ◽  
pp. 60-64
Author(s):  
M.S.B. Abd Rahman ◽  
Mahdi Izadi ◽  
M.Z. Ab Kadir
Keyword(s):  
Electric Field ◽  
Weather Conditions ◽  
Electrical Performance ◽  
Electrical Behaviour ◽  
Air Humidity ◽  
Field Increase ◽  
Polymer Insulator ◽  
Electric Field Increase ◽  
Modeling Software ◽  
Nominal Voltage

This paper presents the behavior of 33kV polymer insulator under nominal voltage and impulse by means of lightning activities. The electrical performance of the insulator is translated to electric field under uniform weather conditions which comprises of air humidity and contamination. ANSYS Maxwell modeling software is used to simulate the structure of the polymer insulator based on the real existing insulator’s dimension. The trend of electric field increase is discussed in detail.

Beam-Recrystallized Device-Worthy Films of Si on SiO2 via Control of the Grain Boundary Location

1983 ◽  
Vol 23 ◽  
Author(s):  
J.P. Colinge ◽  
D. Bensahel ◽  
M. Alamome ◽  
M. Haond ◽  
C. Leguet
Keyword(s):  
Grain Boundary ◽  
Grain Boundaries ◽  
Single Crystals ◽  
Laser Annealing ◽  
Ring Oscillators ◽  
Large Area ◽  
Leakage Currents ◽  
Back Gate ◽  
Boundary Location

ABSTRACTDevice-worthy films of silicon on SiO2 have been produced using laser annealing and antireflection stripes. If no seeding is used, grain boundaries will be localized beneath the stripes; with seeding, large-area single crystals can be grown, of uniform <100> orientation. N-channel transistors show a mobility of 620 cm2/V.s and present leakage currents which can be reduced, however, down to a few pA/um when the substrate (back gate) is negatively biased to − 5 V. Ring oscillators have also been made, which oscillate with a delay per stage of 1 nsec.

scholarly journals Modeling of asynchronous motor operation modes for the correct selection of voltage regulation devices

2020 ◽  
Vol 178 ◽  
pp. 01015 ◽  
Author(s):  
Azat Akhmetshin ◽  
George Marin ◽  
Dmitrii Mendeleev
Keyword(s):  
Voltage Drop ◽  
Asynchronous Motor ◽  
Electric Circuit ◽  
Voltage Regulation ◽  
Correct Selection ◽  
Voltage Level ◽  
Nominal Voltage ◽  
Motor Operation ◽  
Technical Solutions ◽  
Selection Of

Many electrical appliances are used in production and in everyday life, which include elements that are extremely sensitive to voltage deviations from acceptable values. Failure in their work can cause equipment failure or a breakdown in technological processes. There are a number of technical solutions to solve this problem, one of which is the using of voltage control devices such as boost transformers. The principle of operation of booster transformers is the introduction of a longitudinal EMF into the electric circuit, which provides booster. The choice of voltage regulation devices consists in determining its power and the required transformation ratio. The latter needs some justification, because it cannot be formally accepted: if it is necessary to increase the voltage, for example by 5%, it is enough to introduce a longitudinal EMF of 5% of the nominal voltage into the electric circuit. This is due to the fact that with increasing voltage from the load side, the power consumption also increases, which causes an increase in voltage drop compared to modes in the absence of voltage regulation devices. Thus, the load will receive a slightly lower voltage level in comparison with the desired one.

Modeling the Performance of Flattened Tubular Solid Oxide Fuel Cell

2004 ◽  
Vol 2 (1) ◽  
pp. 52-59 ◽  
Author(s):  
A. Bharadwaj ◽  
D. H. Archer ◽  
E. S. Rubin
Keyword(s):  
Fuel Cell ◽  
Solid Oxide Fuel Cell ◽  
Cross Section ◽  
Current Density Distribution ◽  
Solid Oxide ◽  
Electrical Performance ◽  
Operating Voltage ◽  
Oxide Fuel ◽  
Cell Current ◽  
The Given

In this paper, we develop a computational model to predict the electrical performance of the flattened tubular solid oxide fuel cell (SOFC) designed by Siemens Westinghouse Corporation. This design is an improvement over the conventional cylindrical SOFC and allows higher power densities. We modeled the current transport in a cross section of the cell for a given cell operating voltage and local Nernst voltage. We solved the resulting system of simultaneous nonlinear equations using n-dimensional Newton-Raphson algorithm. The output gives the current density distribution and also the total current at the cross section, which is used to obtain the total cell current (and power) for the given voltage. The results of the model are in good agreement with the experimental performance reported in literature.

Enhanced Activation of Standard and Cocktail Spike Annealed Junctions with Additional Sub-melt Laser Anneal

2006 ◽  
Vol 912 ◽  
Author(s):  
Simone Severi ◽  
Emmanuel Augendre ◽  
Bartek Pawlak ◽  
Pierre Eyben ◽  
Taiji Noda ◽  
...  
Keyword(s):  
Performance Improvement ◽  
Laser Annealing ◽  
Short Channel Effects ◽  
Short Channel ◽  
Spacer Length ◽  
Partial Dissolution ◽  
Channel Effects ◽  
Laser Anneal ◽  
And Performance ◽  
Nmos Transistors

AbstractThe advantages of fluorine co-implantation on reducing the deep P junction profile is investigated and commented as a possible valuable solution for further scaling of the NMOS transistors spacer length. On PMOS transistors, Ge+C+B cocktail junctions lead to improved short channel effects control, S/D resistance and performance over the conventional approaches. Additional laser annealing induces a partial dissolution of the doping clusters in the junction and lower the S/D transistors resistance. A performance improvement is demonstrated both for NMOS and PMOS with cocktail junctions activated by spike RTA and additional laser annealing.

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